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2012-08-08Revert part of r161175 which was wrong for OpenBSD's PowerPC target.Hans Wennborg
Contributed by Brad Smith <brad@comstyle.com> git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@161481 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-02Add OpenBSD arch targets for powerpc, arm, mips64, mips64el and sparc.Hans Wennborg
Contributed by Brad Smith <brad@comstyle.com> git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@161175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-01TLS is not supported on OpenBSDHans Wennborg
This fixes PR13502 and adds a test to keep track of which targets support TLS and which do not. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@161124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-13Add a per target max vector alignment field (e.g., 32-byte alignment for x86 ↵Chad Rosier
due to AVX). Currently, if no aligned attribute is specified the alignment of a vector is inferred from its size. Thus, very large vectors will be over-aligned with no benefit. Target owners should set this target max. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@160209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-11Fix handling of curly braces in NVPTX inline asmJustin Holewinski
Fixes bug 13322 Patch by Dmitry Mikushin git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@160050 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-07Wire up -mrdrnd for X86.Benjamin Kramer
For some reason GCC decided to call the feature rdrnd instead of rdrand, which requires translating it for LLVM. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159897 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-06Remove unreachable default case to pacify clang's -Wcovered-switch-default.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159829 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-05MIPS: Define __mips_dsp_rev / __mips_dspr2 / __mips_dsp macrosSimon Atanasyan
if -mdsp or -mdspr2 options are provided. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159774 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-05MIPS: Add -mdsp/-mno-dsp and -mdspr2/-mno-dspr2 command line options support.Simon Atanasyan
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159769 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-05MIPS: Define __mips16 macro if -mips16 option is provided.Simon Atanasyan
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159753 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-05MIPS: Replace the pair of boolean flags by enumeration to hold selected ↵Simon Atanasyan
float ABI. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159752 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-05MIPS: Add -mips16 / -mno-mips16 command line support.Simon Atanasyan
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159747 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-03Add additional architecture defines for PPC targets.Hal Finkel
Patch by Andy Gibbs. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159665 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28Support MIPS DSP Rev1 intrinsics. Simon Atanasyan
This patch was reviewed in the llvm-commits list by Jim Grosbach. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@159366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-16Explicitly build __builtin_va_list.Meador Inge
The target specific __builtin_va_list types are now explicitly built instead of injecting strings into the preprocessor input. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@158592 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-11Add PPC support for translating gcc-style -mcpu options into LLVM ↵Hal Finkel
-target-cpu options. This functionality is based on what is done on ARM, and enables selecting PPC CPUs in a way compatible with gcc's driver. Also, mirroring gcc (and what is done on x86), -mcpu=native support was added. This uses the host cpu detection from LLVM (which will also soon be updated by refactoring code currently in backend). In order for this to work, the target needs a list of valid CPUs -- we now accept all CPUs accepted by LLVM. A few preprocessor defines for common CPU types have been added. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@158334 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-09Add XOP feature flag.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@158284 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-05Mips: Define __mips_hard_float macro additional to __mips_single_floatSimon Atanasyan
when single float ABI is selected. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03Make disabling SSE levels also disable AVX and FMA.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157907 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03Make AES and PCLMUL features imply SSE2 as that's needed to get the right ↵Craig Topper
types defined. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157906 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-03Add fma feature flag for Intel FMA instructions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31Add builtin for pclmulqdq instruction.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157733 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30SSE4A should not imply LZCNT and POPCNT. FMA4 should imply SSE4A. Add ↵Craig Topper
missing break at the end of btver1 feature list. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157680 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29Define __SSE4A__ when targeting new AMD CPUs.Benjamin Kramer
This doesn't really fit the existing SSELevel so it gets an extra flag. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157630 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29Sparc is bigendian.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157626 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Replace PTX back-end with NVPTX back-end in all places where Clang caresJustin Holewinski
NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157403 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Teach Clang about the NVPTX backend.Peter Collingbourne
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20CUDA: add CodeGen support for global variable address spaces.Peter Collingbourne
Because in CUDA types do not have associated address spaces, globals are declared in their "native" address space, and accessed by bitcasting the pointer to address space 0. This relies on address space 0 being a unified address space. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157167 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10Hexagon V5 FP support.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@156567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Enable AVX on AMD Bulldozer processors.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@155900 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-26Define __ANDROID__ macro on -androideabi targets.Evgeniy Stepanov
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@155632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-26Enable AVX/AVX2 for Sandy Bridge, Ivy Bridge, and Haswell CPUs.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@155624 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-25OpenBSD: Remove incorrect -pthread preprocessor define _POSIX_THREADS and ↵Chris Lattner
replace with _REENTRANT. Also remove undef _POSIX_THREADS in phread.h. Patch by Brad Smith! git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@155535 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23Revert r155363, due to the underlying patches in LLVM causing regressionChandler Carruth
test suite failures. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@155371 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23Hexagon V5 (floating point) support in cfe.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@155363 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18Revert some Hexagon builtin commits to match reverts done to LLVM inChandler Carruth
r155047. See the LLVM log for the primary motivation: http://llvm.org/viewvc/llvm-project?rev=155047&view=rev Primary commit r154828: - Several issues were raised in review, and fixed in subsequent commits. - Follow-up commits also reverted, and which should be folded into the original before reposting: - r154837: Re-add the 'undef BUILTIN' thing to fix the build. - r154928: Fix build warnings, re-add (and correct) header and license - r154937: Typo fix. Please resubmit this patch with the relevant LLVM resubmission. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@155048 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18MIPS: Followup to r154606. Expand list of accepted MIPS target features in ↵Simon Atanasyan
the MipsTargetInfoBase::setFeatureEnabled() routine. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@154998 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16Hexagon V5(Floating Point) support.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@154828 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12MIPS: Initialize MIPS CPU's name by default value.Simon Atanasyan
Otherwise MipsTargetInfoBase::getDefaultFeatures() might return an invalid features set with an empty feature name. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@154606 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-05Move some MIPS target macro definitions from class Mips32TargetInfoBaseSimon Atanasyan
to the base class MipsTargetInfoBase. These macros are applicable for both 32/64-bits targets. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@154116 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04[driver] Create a new -mfpmath= option, which is used to control whether clangChad Rosier
uses Neon instructions for single-precision FP. -mfpmath=neon is analogous to passing llc -mattr=+neonfp. -mfpmath=[vfp|vfp2|vfp3|vfp4] is analogous to passing llc -mattr=-neonfp. rdar://11108618 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@154046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03Add more constraint registers for mips.Eric Christopher
Patch by Jack Carter. Testcase cleanup by me. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@153921 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-29ARM backend knows about cortex-m4. The front end should too.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@153678 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-29Define __LITTLE_ENDIAN__ for le32, since "le" stands for little endian.Jan Wen Voung
Add a test for this too. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@153616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-28Fix the type of wchar_t on Solaris.David Chisnall
Patch by Dmitri Shubin! git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@153585 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-27Add better support for $fp and $sp for mips inline asm support.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@153530 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-23Add support for MIPS' floating ABIs (hard, soft and single) to clang driver.Akira Hatanaka
Patch by Simon Atanasyan. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@153348 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-14No longer defining LP64 in 64-bit builds on platforms which are not LP64.Aaron Ballman
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@152740 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-13Fix the long double to be of width/align 64. Rename va_list_test toRoman Divacky
powerpc_types and add testing for the (long) double there. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@152647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-13Long double is just double on FreeBSD/{PPC,PPC64}.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@152632 91177308-0d34-0410-b5e6-96231b3b80d8
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