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| author | Mark Seaborn <mseaborn@chromium.org> | 2013-06-24 15:46:39 -0700 |
|---|---|---|
| committer | Mark Seaborn <mseaborn@chromium.org> | 2013-06-24 15:46:39 -0700 |
| commit | 8f0218fcec810b1178a0515843aceef43a339869 (patch) | |
| tree | d668ffb60606865c98fce592d018e26cfe7820f5 /test | |
| parent | bdfbe91f5f6db852e3e91d6830a82b323c4dd846 (diff) | |
Switch back to non-ARM ABI for C++ guard variables under PNaCl
My previous change set IsARM=true for PNaCl in ItaniumCXXABI.cpp.
This gives us ARM-style representation of method pointers, which we
want, and ARM-style usage of guard variables, which we don't
necessarily want.
Switch the latter back so that the guard variable is tested via "load
i8 and compare with zero" rather than a "load i32 and test the bottom
bit". This should make the Clang-generated code match with how
libstdc++ is using the guard variable.
This makes the code match the patch I sent upstream (which hasn't been
committed yet).
BUG=https://code.google.com/p/nativeclient/issues/detail?id=3450
TEST=test/CodeGenCXX/static-init-pnacl.cpp
Review URL: https://codereview.chromium.org/17616003
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGenCXX/static-init-pnacl.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGenCXX/static-init-pnacl.cpp b/test/CodeGenCXX/static-init-pnacl.cpp new file mode 100644 index 0000000000..65844e5d34 --- /dev/null +++ b/test/CodeGenCXX/static-init-pnacl.cpp @@ -0,0 +1,14 @@ +// RUN: %clang_cc1 -emit-llvm -triple=le32-unknown-nacl -o - %s | FileCheck %s + +int f(); + +// Test that PNaCl uses the Itanium/x86 ABI in which the static +// variable's guard variable is tested via "load i8 and compare with +// zero" rather than the ARM ABI which uses "load i32 and test the +// bottom bit". +void g() { + static int a = f(); +} +// CHECK: load atomic i8* bitcast (i64* @_ZGVZ1gvE1a to i8*) acquire +// CHECK-NEXT: %guard.uninitialized = icmp eq i8 %0, 0 +// CHECK-NEXT: br i1 %guard.uninitialized, label %init.check, label %init.end |