Abstract IR generation of array cookies into the C++ ABI class and

implement ARM array cookies.  Also fix a few unfortunate bugs:
  - throwing dtors in deletes prevented the allocation from being deleted
  - adding the cookie to the new[] size was not being considered for
    overflow (and, more seriously, was screwing up the earlier checks)
  - deleting an array via a pointer to array of class type was not
    causing any destructors to be run and was passing the unadjusted
    pointer to the deallocator
  - lots of address-space problems, in case anyone wants to support
    free store in a variant address space :)



git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@112814 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 39 insertions, 1 deletions

diff --git a/test/CodeGenCXX/delete.cpp b/test/CodeGenCXX/delete.cpp
index 87f8698b84..ec13d0cc0f 100644
--- a/test/CodeGenCXX/delete.cpp
+++ b/test/CodeGenCXX/delete.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-apple-darwin10 %s -emit-llvm -o - | FileCheck %s
 
 void t1(int *a) {
   delete a;
@@ -57,3 +57,41 @@ namespace test0 {
   // CHECK: define linkonce_odr void @_ZN5test01AD1Ev
   // CHECK: define linkonce_odr void @_ZN5test01AdlEPv
 }
+
+namespace test1 {
+  struct A {
+    int x;
+    ~A();
+  };
+
+  // CHECK: define void @_ZN5test14testEPA10_A20_NS_1AE(
+  void test(A (*arr)[10][20]) {
+    delete [] arr;
+    // CHECK:      icmp eq [10 x [20 x [[S:%.*]]]]* [[PTR:%.*]], null
+    // CHECK-NEXT: br i1
+
+    // CHECK:      [[ARR:%.*]] = getelementptr inbounds [10 x [20 x [[S]]]]* [[PTR]], i32 0, i32 0, i32 0
+    // CHECK-NEXT: bitcast {{.*}} to i8*
+    // CHECK-NEXT: [[ALLOC:%.*]] = getelementptr inbounds {{.*}}, i64 -8
+    // CHECK-NEXT: bitcast i8* [[ALLOC]] to i64*
+    // CHECK-NEXT: load
+    // CHECK-NEXT: store i64 {{.*}}, i64* [[IDX:%.*]]
+
+    // CHECK:      load i64* [[IDX]]
+    // CHECK-NEXT: icmp ne {{.*}}, 0
+    // CHECK-NEXT: br i1
+
+    // CHECK:      load i64* [[IDX]]
+    // CHECK-NEXT: [[I:%.*]] = sub i64 {{.*}}, 1
+    // CHECK-NEXT: getelementptr inbounds [[S]]* [[ARR]], i64 [[I]]
+    // CHECK-NEXT: call void @_ZN5test11AD1Ev(
+    // CHECK-NEXT: br label
+
+    // CHECK:      load i64* [[IDX]]
+    // CHECK-NEXT: sub
+    // CHECK-NEXT: store {{.*}}, i64* [[IDX]]
+    // CHECK-NEXT: br label
+
+    // CHECK:      call void @_ZdaPv(i8* [[ALLOC]])
+  }
+}