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| author | Chad Rosier <mcrosier@apple.com> | 2012-03-20 16:40:00 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2012-03-20 16:40:00 +0000 |
| commit | db163c87f990653b59fcc5f6e4864b652f4a49bd (patch) | |
| tree | 9786570759b5bd82e958333f932f428eec99f6e5 /lib/CodeGen/CGVTables.cpp | |
| parent | acd76fe8e1b1b3fd83dac66848041629a8b06e8a (diff) | |
[avx] Define the _mm256_loadu2_xxx and _mm256_storeu2_xxx intrinsics.
From the Intel Optimization Reference Manual, Section 11.6.2. When data cannot
be aligned or alignment is not known, 16-byte memory accesses may provide better
performance.
rdar://11076953
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@153091 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/CGVTables.cpp')
0 files changed, 0 insertions, 0 deletions