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authorDaniel Dunbar <daniel@zuster.org>2010-09-23 01:54:32 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-09-23 01:54:32 +0000
commitf554b1cc3083d9ed1fb9b52a305025f744e90d08 (patch)
tree9176d77515de0a4448bf447a5bedcb9a98308e46
parent8aa87c71d9bfec14e135c683b0d7b9de999dbcb0 (diff)
IRgen/ABI/ARM: Return large vectors in memory.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@114619 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/TargetInfo.cpp4
-rw-r--r--test/CodeGen/arm-vector-arguments.c16
2 files changed, 20 insertions, 0 deletions
diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp
index f1da3c3903..e8e25ca6d4 100644
--- a/lib/CodeGen/TargetInfo.cpp
+++ b/lib/CodeGen/TargetInfo.cpp
@@ -2391,6 +2391,10 @@ ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const {
if (RetTy->isVoidType())
return ABIArgInfo::getIgnore();
+ // Large vector types should be returned via memory.
+ if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128)
+ return ABIArgInfo::getIndirect(0);
+
if (!isAggregateTypeForABI(RetTy)) {
// Treat an enum type as its underlying type.
if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
diff --git a/test/CodeGen/arm-vector-arguments.c b/test/CodeGen/arm-vector-arguments.c
index 0d1bdd1674..0d28642e4b 100644
--- a/test/CodeGen/arm-vector-arguments.c
+++ b/test/CodeGen/arm-vector-arguments.c
@@ -11,3 +11,19 @@
int8x16_t f0(int8x16_t a0, int8x16_t a1) {
return vzipq_s8(a0, a1).val[0];
}
+
+// Test direct vector passing.
+
+typedef float T_float32x2 __attribute__ ((__vector_size__ (8)));
+typedef float T_float32x4 __attribute__ ((__vector_size__ (16)));
+typedef float T_float32x8 __attribute__ ((__vector_size__ (32)));
+typedef float T_float32x16 __attribute__ ((__vector_size__ (64)));
+
+// CHECK: define <2 x float> @f1_0(<2 x float> %{{.*}})
+T_float32x2 f1_0(T_float32x2 a0) { return a0; }
+// CHECK: define <4 x float> @f1_1(<4 x float> %{{.*}})
+T_float32x4 f1_1(T_float32x4 a0) { return a0; }
+// CHECK: define void @f1_2(<8 x float>* sret %{{.*}}, <8 x float> %{{.*}})
+T_float32x8 f1_2(T_float32x8 a0) { return a0; }
+// CHECK: define void @f1_3(<16 x float>* sret %{{.*}}, <16 x float> %{{.*}})
+T_float32x16 f1_3(T_float32x16 a0) { return a0; }