aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorEric Christopher <echristo@apple.com>2011-07-26 22:52:35 +0000
committerEric Christopher <echristo@apple.com>2011-07-26 22:52:35 +0000
commitd579a8855d8b7aef3a2efaea218ac5e8f5b42fa5 (patch)
tree26f521d4190fd0b75aed2de2245ac1d462eb4c15
parente33f643230738400f0bf5503a87d886e9bc635de (diff)
Generalize for various build bots.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@136173 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/CodeGen/asm-reg-var-local.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/test/CodeGen/asm-reg-var-local.c b/test/CodeGen/asm-reg-var-local.c
index 435df2f703..9060e120ff 100644
--- a/test/CodeGen/asm-reg-var-local.c
+++ b/test/CodeGen/asm-reg-var-local.c
@@ -2,23 +2,23 @@
// Exercise various use cases for local asm "register variables".
int foo() {
-// CHECK: %a = alloca i32
+// CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32
register int a asm("rsi")=5;
-// CHECK: store i32 5, i32* %a
+// CHECK: store i32 5, i32* [[A]]
asm volatile("; %0 This asm defines rsi" : "=r"(a));
-// CHECK: %0 = call i32 asm sideeffect "; $0 This asm defines rsi", "={rsi},~{dirflag},~{fpsr},~{flags}"()
-// CHECK: store i32 %0, i32* %a
+// CHECK: [[Z:%[a-zA-Z0-9]+]] = call i32 asm sideeffect "; $0 This asm defines rsi", "={rsi},~{dirflag},~{fpsr},~{flags}"()
+// CHECK: store i32 [[Z]], i32* [[A]]
a = 42;
-// CHECK: store i32 42, i32* %a
+// CHECK: store i32 42, i32* [[A]]
asm volatile("; %0 This asm uses rsi" : : "r"(a));
-// CHECK: %tmp = load i32* %a
-// CHECK: call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 %tmp)
+// CHECK: [[TMP:%[a-zA-Z0-9]+]] = load i32* [[A]]
+// CHECK: call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 [[TMP]])
return a;
-// CHECK: %tmp1 = load i32* %a
-// CHECK: ret i32 %tmp1
+// CHECK: [[TMP1:%[a-zA-Z0-9]+]] = load i32* [[A]]
+// CHECK: ret i32 [[TMP1]]
}