Add better support for $fp and $sp for mips inline asm support.

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@153530 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 89 insertions, 5 deletions

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index d4e5d2d4d2..7442432975 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -3491,14 +3491,18 @@ public:
   virtual void getGCCRegNames(const char * const *&Names,
                               unsigned &NumNames) const {
     static const char * const GCCRegNames[] = {
+      // CPU register names
+      // Must match second column of GCCRegAliases
       "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
       "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
       "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
-      "$24",  "$25",  "$26",  "$27",  "$28",  "$sp",  "$fp",  "$31",
+      "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31",
+      // Floating point register names
       "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
       "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
       "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
       "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
+      // Hi/lo and condition register names
       "hi",   "lo",   "",     "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
       "$fcc5","$fcc6","$fcc7"
     };
@@ -3622,8 +3626,8 @@ public:
       { { "k0" }, "$26" },
       { { "k1" }, "$27" },
       { { "gp" }, "$28" },
-      { { "sp" }, "$29" },
-      { { "fp" }, "$30" },
+      { { "sp","$sp" }, "$29" },
+      { { "fp","$fp" }, "$30" },
       { { "ra" }, "$31" }
     };
     Aliases = GCCRegAliases;
@@ -3740,8 +3744,8 @@ public:
       { { "k0" }, "$26" },
       { { "k1" }, "$27" },
       { { "gp" }, "$28" },
-      { { "sp" }, "$29" },
-      { { "fp" }, "$30" },
+      { { "sp","$sp" }, "$29" },
+      { { "fp","$fp" }, "$30" },
       { { "ra" }, "$31" }
     };
     Aliases = GCCRegAliases;
diff --git a/test/CodeGen/mips-clobber-reg.c b/test/CodeGen/mips-clobber-reg.c
new file mode 100644
index 0000000000..2a06e53b39
--- /dev/null
+++ b/test/CodeGen/mips-clobber-reg.c
@@ -0,0 +1,80 @@
+// RUN: %clang -target mipsel-unknown-linux -ccc-clang-archs mipsel -S -o - -emit-llvm %s 
+
+/*
+    This checks that the frontend will accept both
+    enumerated and symbolic Mips GPR register names.
+    
+    Any bad names will make the frontend choke.
+ */
+
+main()
+{
+
+    __asm__ __volatile__ (".set noat \n\t addi $7,$at,77":::"at"); 
+    __asm__ __volatile__ ("addi $7,$v0,77":::"v0"); 
+    __asm__ __volatile__ ("addi $7,$v1,77":::"v1"); 
+    __asm__ __volatile__ ("addi $7,$a0,77":::"a0"); 
+    __asm__ __volatile__ ("addi $7,$a1,77":::"a1"); 
+    __asm__ __volatile__ ("addi $7,$a2,77":::"a2"); 
+    __asm__ __volatile__ ("addi $7,$a3,77":::"a3"); 
+    __asm__ __volatile__ ("addi $7,$t0,77":::"t0"); 
+    __asm__ __volatile__ ("addi $7,$t1,77":::"t1"); 
+    __asm__ __volatile__ ("addi $7,$t2,77":::"t2"); 
+    __asm__ __volatile__ ("addi $7,$t3,77":::"t3"); 
+    __asm__ __volatile__ ("addi $7,$t4,77":::"t4"); 
+    __asm__ __volatile__ ("addi $7,$t5,77":::"t5"); 
+    __asm__ __volatile__ ("addi $7,$t6,77":::"t6"); 
+    __asm__ __volatile__ ("addi $7,$t7,77":::"t7"); 
+    __asm__ __volatile__ ("addi $7,$s0,77":::"s0"); 
+    __asm__ __volatile__ ("addi $7,$s1,77":::"s1"); 
+    __asm__ __volatile__ ("addi $7,$s2,77":::"s2"); 
+    __asm__ __volatile__ ("addi $7,$s3,77":::"s3"); 
+    __asm__ __volatile__ ("addi $7,$s4,77":::"s4"); 
+    __asm__ __volatile__ ("addi $7,$s5,77":::"s5"); 
+    __asm__ __volatile__ ("addi $7,$s6,77":::"s6"); 
+    __asm__ __volatile__ ("addi $7,$s7,77":::"s7"); 
+    __asm__ __volatile__ ("addi $7,$t8,77":::"t8"); 
+    __asm__ __volatile__ ("addi $7,$t9,77":::"t9"); 
+    __asm__ __volatile__ ("addi $7,$k0,77":::"k0"); 
+    __asm__ __volatile__ ("addi $7,$k1,77":::"k1"); 
+    __asm__ __volatile__ ("addi $7,$gp,77":::"gp"); 
+    __asm__ __volatile__ ("addi $7,$sp,77":::"sp"); 
+    __asm__ __volatile__ ("addi $7,$fp,77":::"fp"); 
+    __asm__ __volatile__ ("addi $7,$sp,77":::"$sp"); 
+    __asm__ __volatile__ ("addi $7,$fp,77":::"$fp"); 
+    __asm__ __volatile__ ("addi $7,$ra,77":::"ra"); 
+
+    __asm__ __volatile__ ("addi $7,$0,77":::"$0"); 
+    __asm__ __volatile__ (".set noat \n\t addi $7,$1,77":::"$1"); 
+    __asm__ __volatile__ ("addi $7,$2,77":::"$2"); 
+    __asm__ __volatile__ ("addi $7,$3,77":::"$3"); 
+    __asm__ __volatile__ ("addi $7,$4,77":::"$4"); 
+    __asm__ __volatile__ ("addi $7,$5,77":::"$5"); 
+    __asm__ __volatile__ ("addi $7,$6,77":::"$6"); 
+    __asm__ __volatile__ ("addi $7,$7,77":::"$7"); 
+    __asm__ __volatile__ ("addi $7,$8,77":::"$8"); 
+    __asm__ __volatile__ ("addi $7,$9,77":::"$9"); 
+    __asm__ __volatile__ ("addi $7,$10,77":::"$10"); 
+    __asm__ __volatile__ ("addi $7,$11,77":::"$10"); 
+    __asm__ __volatile__ ("addi $7,$12,77":::"$12"); 
+    __asm__ __volatile__ ("addi $7,$13,77":::"$13"); 
+    __asm__ __volatile__ ("addi $7,$14,77":::"$14"); 
+    __asm__ __volatile__ ("addi $7,$15,77":::"$15"); 
+    __asm__ __volatile__ ("addi $7,$16,77":::"$16"); 
+    __asm__ __volatile__ ("addi $7,$17,77":::"$17"); 
+    __asm__ __volatile__ ("addi $7,$18,77":::"$18"); 
+    __asm__ __volatile__ ("addi $7,$19,77":::"$19"); 
+    __asm__ __volatile__ ("addi $7,$20,77":::"$20"); 
+    __asm__ __volatile__ ("addi $7,$21,77":::"$21"); 
+    __asm__ __volatile__ ("addi $7,$22,77":::"$22"); 
+    __asm__ __volatile__ ("addi $7,$23,77":::"$23"); 
+    __asm__ __volatile__ ("addi $7,$24,77":::"$24"); 
+    __asm__ __volatile__ ("addi $7,$25,77":::"$25"); 
+    __asm__ __volatile__ ("addi $7,$26,77":::"$26"); 
+    __asm__ __volatile__ ("addi $7,$27,77":::"$27"); 
+    __asm__ __volatile__ ("addi $7,$28,77":::"$28"); 
+    __asm__ __volatile__ ("addi $7,$29,77":::"$29"); 
+    __asm__ __volatile__ ("addi $7,$30,77":::"$30"); 
+    __asm__ __volatile__ ("addi $7,$31,77":::"$31"); 
+
+}