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/*
* Copyright (c) 2013-2014, Freescale Semiconductor, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "board.h"
#include "fsl_clock_manager.h"
#include "fsl_smc_hal.h"
#include "fsl_debug_console.h"
#include "pin_mux.h"
/* Configuration for enter VLPR mode. Core clock = 2MHz. */
const clock_manager_user_config_t g_defaultClockConfigVlpr =
{
.mcgliteConfig =
{
.mcglite_mode = kMcgliteModeLirc8M, // Work in LIRC_8M mode.
.irclkEnable = true, // MCGIRCLK enable.
.irclkEnableInStop = false, // MCGIRCLK disable in STOP mode.
.ircs = kMcgliteLircSel2M, // Select LIRC_2M.
.fcrdiv = kMcgliteLircDivBy1, // FCRDIV is 0.
.lircDiv2 = kMcgliteLircDivBy1, // LIRC_DIV2 is 0.
.hircEnableInNotHircMode = false, // HIRC disable.
},
.simConfig =
{
.er32kSrc = kClockEr32kSrcOsc0, // ERCLK32K selection, use OSC.
.outdiv1 = 0U,
.outdiv4 = 1U,
},
.oscerConfig =
{
.enable = false, // OSCERCLK disable.
.enableInStop = false, // OSCERCLK disable in STOP mode.
}
};
/* Configuration for enter RUN mode. Core clock = 48MHz. */
const clock_manager_user_config_t g_defaultClockConfigRun =
{
.mcgliteConfig =
{
.mcglite_mode = kMcgliteModeHirc48M, // Work in HIRC mode.
.irclkEnable = false, // MCGIRCLK disable.
.irclkEnableInStop = false, // MCGIRCLK disable in STOP mode.
.ircs = kMcgliteLircSel2M, // Select LIRC_2M.
.fcrdiv = kMcgliteLircDivBy1, // FCRDIV is 0.
.lircDiv2 = kMcgliteLircDivBy1, // LIRC_DIV2 is 0.
.hircEnableInNotHircMode = true, // HIRC disable.
},
.simConfig =
{
.er32kSrc = kClockEr32kSrcOsc0, // ERCLK32K selection, use OSC.
.outdiv1 = 0U,
.outdiv4 = 1U,
},
.oscerConfig =
{
.enable = false, // OSCERCLK disable.
.enableInStop = false, // OSCERCLK disable in STOP mode.
}
};
/* Function to initialize OSC0 base on board configuration. */
void BOARD_InitOsc0(void)
{
// OSC0 configuration.
osc_user_config_t osc0Config =
{
.freq = OSC0_XTAL_FREQ,
.hgo = MCG_HGO0,
.range = MCG_RANGE0,
.erefs = MCG_EREFS0,
.enableCapacitor2p = OSC0_SC2P_ENABLE_CONFIG,
.enableCapacitor4p = OSC0_SC4P_ENABLE_CONFIG,
.enableCapacitor8p = OSC0_SC8P_ENABLE_CONFIG,
.enableCapacitor16p = OSC0_SC16P_ENABLE_CONFIG,
};
CLOCK_SYS_OscInit(0U, &osc0Config);
}
/* Function to initialize RTC external clock base on board configuration. */
void BOARD_InitRtcOsc(void)
{
#if ((OSC0_XTAL_FREQ != 32768U) && (RTC_OSC_ENABLE_CONFIG))
#error Set RTC_OSC_ENABLE_CONFIG will override OSC0 configuration and OSC0 must be 32k.
#endif
rtc_osc_user_config_t rtcOscConfig =
{
.freq = RTC_XTAL_FREQ,
.enableCapacitor2p = RTC_SC2P_ENABLE_CONFIG,
.enableCapacitor4p = RTC_SC4P_ENABLE_CONFIG,
.enableCapacitor8p = RTC_SC8P_ENABLE_CONFIG,
.enableCapacitor16p = RTC_SC16P_ENABLE_CONFIG,
.enableOsc = RTC_OSC_ENABLE_CONFIG,
.enableClockOutput = RTC_CLK_OUTPUT_ENABLE_CONFIG,
};
CLOCK_SYS_RtcOscInit(0U, &rtcOscConfig);
}
/* Initialize clock. */
void BOARD_ClockInit(void)
{
/* Set allowed power mode, allow all. */
SMC_HAL_SetProtection(SMC, kAllowPowerModeAll);
/* Setup board clock source. */
// Setup OSC0 if used.
// Configure OSC0 pin mux.
PORT_HAL_SetMuxMode(EXTAL0_PORT, EXTAL0_PIN, EXTAL0_PINMUX);
PORT_HAL_SetMuxMode(XTAL0_PORT, XTAL0_PIN, XTAL0_PINMUX);
BOARD_InitOsc0();
// Setup RTC external clock if used.
#if RTC_XTAL_FREQ
// If RTC_CLKIN is connected, need to set pin mux. Another way for
// RTC clock is set RTC_OSC_ENABLE_CONFIG to use OSC0, please check
// reference manual for datails.
PORT_HAL_SetMuxMode(RTC_CLKIN_PORT, RTC_CLKIN_PIN, RTC_CLKIN_PINMUX);
#endif
BOARD_InitRtcOsc();
/* Set system clock configuration. */
#if (CLOCK_INIT_CONFIG == CLOCK_VLPR)
CLOCK_SYS_SetConfiguration(&g_defaultClockConfigVlpr);
#else
CLOCK_SYS_SetConfiguration(&g_defaultClockConfigRun);
#endif
}
void dbg_uart_init(void)
{
configure_lpuart_pins(BOARD_DEBUG_UART_INSTANCE);
#if (CLOCK_INIT_CONFIG == CLOCK_VLPR)
CLOCK_SYS_SetLpuartSrc(BOARD_DEBUG_UART_INSTANCE, kClockLpuartSrcMcgIrClk);
#else
CLOCK_SYS_SetLpuartSrc(BOARD_DEBUG_UART_INSTANCE, kClockLpuartSrcIrc48M);
#endif
DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUD, kDebugConsoleLPUART);
}
/*******************************************************************************
* EOF
******************************************************************************/
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