From ecb117cf0e214ac643bd7bbb6ca9d6fd974e36f8 Mon Sep 17 00:00:00 2001 From: David Barksdale Date: Thu, 14 Apr 2022 12:46:45 -0500 Subject: Enclosure with recessed plug for strain relief. --- box/simple_box.scad | 179 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 179 insertions(+) create mode 100644 box/simple_box.scad (limited to 'box/simple_box.scad') diff --git a/box/simple_box.scad b/box/simple_box.scad new file mode 100644 index 0000000..585668e --- /dev/null +++ b/box/simple_box.scad @@ -0,0 +1,179 @@ + + +module RoundBox(length, width, height, radius) +{ + translate([0, radius, radius]) + { + minkowski() + { + cube([length / 2, width - 2 * radius, height - 2 * radius]); + rotate([0, 90, 0]) + cylinder(r=radius, h=length / 2, center=false); + } + } +} + +IN = 25.4; +origin_x = 3.85 * IN; +origin_y = 4.85 * IN; + +include + +// Overrides + +//-- which half do you want to print? +printBaseShell = true; +printLidShell = true; + +//-- Edit these parameters for your own board dimensions +wallThickness = 1.6; +basePlaneThickness = 1.6; +lidPlaneThickness = 1.6; + +//-- Label depths +baseLabelDepth = 0.4; +lidLabelDepth = 0.4; +leftLabelDepth = 0.4; +rightLabelDepth = 0.4; +frontLabelDepth = 0.4; +backLabelDepth = 0.4; + +//-- Total height of box = basePlaneThickness + lidPlaneThickness +//-- + baseWallHeight + lidWallHeight +//-- space between pcb and lidPlane := +//-- (bottonWallHeight+lidWallHeight) - (standoffHeight+pcbThickness) +baseWallHeight = 8; +lidWallHeight = 14.4; + +//-- ridge where base and lid off box can overlap +//-- Make sure this isn't less than lidWallHeight +ridgeHeight = 3.0; +ridgeSlack = 0.2; +roundRadius = 3.0; + +//-- pcb dimensions +pcbLength = 2.4 * IN; +pcbWidth = 1.8 * IN; +pcbThickness = 1.6; + +//-- How much the PCB needs to be raised from the base +//-- to leave room for solderings and whatnot +standoffHeight = 3.4; +pinDiameter = 2.7; +standoffDiameter = 6; + +//-- padding between pcb and inside wall +paddingFront = 0.1; +paddingBack = 0.1; +paddingRight = 0.1; +paddingLeft = 0.1; + +//-- pcb_standoffs -- origin is pcb[0,0,0] +// (0) = posx +// (1) = posy +// (2) = { yappBoth | yappLidOnly | yappBaseOnly } +// (3) = { yappHole, YappPin } +pcbStands = [ + [ 4 * IN - origin_x, -4.7 * IN + origin_y, yappBoth, yappPin ], + [ 4 * IN - origin_x, -3.2 * IN + origin_y, yappBoth, yappPin ], + [ 6.1 * IN - origin_x, -3.2 * IN + origin_y, yappBoth, yappPin ], + [ 6.1 * IN - origin_x, -4.7 * IN + origin_y, yappBoth, yappPin ] +]; + +//-- Lid plane -- origin is pcb[0,0,0] +// (0) = posx +// (1) = posy +// (2) = width +// (3) = length +// (4) = angle +// (5) = { yappRectangle | yappCircle } +// (6) = { yappCenter } +cutoutsLid = [ + [4.8 * IN - origin_x + 1.27, -4.5 * IN + origin_y, 5, 5, 0, yappCircle] +]; + +//-- front plane -- origin is pcb[0,0,0] +// (0) = posy +// (1) = posz +// (2) = width +// (3) = height +// (4) = angle +// (5) = { yappRectangle | yappCircle } +// (6) = { yappCenter } +cutoutsFront = [ + [-3.67 * IN + origin_y - 9/2, 0, 9, 3.3, 0, yappRectangle] +]; + +//-- back plane -- origin is pcb[0,0,0] +// (0) = posy +// (1) = posz +// (2) = width +// (3) = height +// (4) = angle +// (5) = { yappRectangle | yappCircle } +// (6) = { yappCenter } +cutoutsBack = [ + [21.96, 0, 15.6, 12.7, 0, yappRectangle], + [9.3, 0, 9, 11, 0, yappRectangle] +]; + +//-- snap Joins -- origen = box[x0,y0] +// (0) = posx | posy +// (1) = width +// (2..5) = yappLeft / yappRight / yappFront / yappBack (one or more) +// (n) = { yappSymmetric } +snapJoins = [ + [2, 5, yappLeft, yappRight, yappSymmetric] +]; + +//-- origin of labels is box [0,0,0] +// (0) = posx +// (1) = posy/z +// (2) = orientation +// (3) = plane {lid | base | left | right | front | back } +// (4) = font +// (5) = size +// (6) = "label text" +labelsPlane = [ + [12, 35, 0, "lid", "Liberation Mono:style=bold", 4, "Square Dishy"], + [15, 30, 0, "lid", "Liberation Mono:style=bold", 4, "150W PoE++" ], + [15, 25, 0, "lid", "Liberation Mono:style=bold", 4, "50V DC" ], +]; + +// Reference board model +translate([pcbX - origin_x, pcbY + origin_y, pcbZ - pcbThickness / 2]) + %import("poe.stl"); + +// DEBUG +//showSideBySide = false; +onLidGap = 0; + +module lid_diagrams() { + translate([15, 18, -lidLabelDepth]) + linear_extrude(basePlaneThickness) + scale([0.15, 0.15, 1]) + import("Polarity_marking_center_positive.svg"); + + translate([shellLength - frontLabelDepth, 23.5, -12]) + rotate([90, 0, 90]) + linear_extrude(basePlaneThickness) + scale([0.075, 0.075, 1]) + import("plug.svg"); +} + +difference() { + YAPPgenerate(); + + if (printLidShell) { + if (showSideBySide) { + mirror([0,0,1]) + mirror([0,1,0]) + translate([0, (5 + shellWidth+(shiftLid/2))*-2, 0]) + lid_diagrams(); + } else { + translate([0, 0, (baseWallHeight+basePlaneThickness+ + lidWallHeight+lidPlaneThickness+onLidGap)]) + lid_diagrams(); + } + } +} \ No newline at end of file -- cgit v1.2.3-18-g5258