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# script for str9
# For more information about the configuration files, take a look at:
# openocd.texi
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME str912
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
# jtag speed. We need to stick to 16kHz until we've finished reset.
jtag_rclk 16
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
#reset_config trst_and_srst
if { [info exists FLASHTAPID ] } {
set _FLASHTAPID $FLASHTAPID
} else {
set _FLASHTAPID 0x04570041
}
jtag newtap $_CHIPNAME flash \
-irlen 8 -ircapture 0x1 -irmask 0x1 \
-expected-id $_FLASHTAPID
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x25966041
}
jtag newtap $_CHIPNAME cpu \
-irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_CPUTAPID
if { [info exists BSTAPID ] } {
set _BSTAPID1 $BSTAPID
set _BSTAPID2 $BSTAPID
} else {
set _BSTAPID1 0x1457f041
set _BSTAPID2 0x2457f041
}
jtag newtap $_CHIPNAME bs \
-irlen 5 -ircapture 0x1 -irmask 0x1 \
-expected-id $_BSTAPID1 -expected-id $_BSTAPID2
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm966e \
-endian $_ENDIAN \
-chain-position $_TARGETNAME \
-variant arm966e
$_TARGETNAME configure -event reset-start { jtag_rclk 16 }
proc str9x_config { } {
# -- Enable 96K RAM w/:
# PFQBC enabled / DTCM & AHB wait-states disabled
mww 0x5C002034 0x0191
# PFQBC disabled / DTCM & AHB wait-states enabled
#mww 0x5C002034 0x0196
# 256K/32k
str9x flash_config 0 3 2 0 0x40000
# 512K/32K
#str9x flash_config 0 4 2 0 0x80000
}
proc str9x_init { } {
# enable RTCK
jtag_rclk 0
str9x_config
}
$_TARGETNAME configure -event reset-init str9x_init
$_TARGETNAME configure \
-work-area-virt 0 \
-work-area-phys 0x50000000 \
-work-area-size 16384 \
-work-area-backup 0
#flash bank str9x <base> <size> 0 0 <target#> <variant>
flash bank str9x 0x00000000 0x00040000 0 0 0
flash bank str9x 0x00040000 0x00008000 0 0 0
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