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set AT91_WDT_CR [expr ($AT91_WDT + 0x00)] ;# Watchdog Control Register
set AT91_WDT_WDRSTT [expr (1 << 0)] ;# Restart
set AT91_WDT_KEY [expr (0xa5 << 24)] ;# KEY Password
set AT91_WDT_MR [expr ($AT91_WDT + 0x04)] ;# Watchdog Mode Register
set AT91_WDT_WDV [expr (0xfff << 0)] ;# Counter Value
set AT91_WDT_WDFIEN [expr (1 << 12)] ;# Fault Interrupt Enable
set AT91_WDT_WDRSTEN [expr (1 << 13)] ;# Reset Processor
set AT91_WDT_WDRPROC [expr (1 << 14)] ;# Timer Restart
set AT91_WDT_WDDIS [expr (1 << 15)] ;# Watchdog Disable
set AT91_WDT_WDD [expr (0xfff << 16)] ;# Delta Value
set AT91_WDT_WDDBGHLT [expr (1 << 28)] ;# Debug Halt
set AT91_WDT_WDIDLEHLT [expr (1 << 29)] ;# Idle Halt
set AT91_WDT_SR [expr ($AT91_WDT + 0x08)] ;# Watchdog Status Register
set AT91_WDT_WDUNF [expr (1 << 0)] ;# Watchdog Underflow
set AT91_WDT_WDERR [expr (1 << 1)] ;# Watchdog Error
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