From 712165f4831afed3a1410579d2e708581e4356fb Mon Sep 17 00:00:00 2001 From: Franck Jullien Date: Fri, 30 May 2014 16:49:42 +0200 Subject: openrisc: add support for JTAG Serial Port Change-Id: I623a8c74bcca2edb5f996b69c02d73a6f67b7d34 Signed-off-by: Franck Jullien Reviewed-on: http://openocd.zylin.com/2162 Tested-by: jenkins Reviewed-by: Spencer Oliver --- tcl/target/or1k.cfg | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'tcl/target') diff --git a/tcl/target/or1k.cfg b/tcl/target/or1k.cfg index acec7002..360a0ddf 100644 --- a/tcl/target/or1k.cfg +++ b/tcl/target/or1k.cfg @@ -61,10 +61,12 @@ if { [string compare $_TAP_TYPE "VJTAG"] == 0 } { # Select the debug unit core we are using. This debug unit as an option. -proc ADBG_USE_HISPEED {} { return 1 } +set ADBG_USE_HISPEED 1 +set ENABLE_JSP_SERVER 2 +set ENABLE_JSP_MULTI 4 # If ADBG_USE_HISPEED is set (options bit 1), status bits will be skipped # on burst reads and writes to improve download speeds. # This option must match the RTL configured option. -du_select adv [ADBG_USE_HISPEED] +du_select adv [expr $ADBG_USE_HISPEED | $ENABLE_JSP_SERVER | $ENABLE_JSP_MULTI] -- cgit v1.2.3-18-g5258