From 4831ce4433adf4e2fbf5729bebf8c0f7c2fce1c1 Mon Sep 17 00:00:00 2001 From: Salvador Arroyo Date: Sun, 7 May 2017 18:39:17 +0200 Subject: mips32: add micromips isa handling Read and save configuration registers, up to 4. Config3 holds the micromips implementation info. Added isa implementation info to mips32_common. Added isa filter to avoid common mistakes, but only if one isa mode is implemented. When resuming the isa requested is set if more than one isa mode is implemented. Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28 Signed-off-by: Salvador Arroyo Reviewed-on: http://openocd.zylin.com/4123 Tested-by: jenkins Reviewed-by: Freddie Chopin --- src/target/mips_m4k.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'src/target/mips_m4k.h') diff --git a/src/target/mips_m4k.h b/src/target/mips_m4k.h index cf826612..ea09ae52 100644 --- a/src/target/mips_m4k.h +++ b/src/target/mips_m4k.h @@ -41,6 +41,17 @@ target_to_m4k(struct target *target) struct mips_m4k_common, mips32); } +static inline void mips_m4k_isa_filter(enum mips32_isa_imp isa_imp, target_addr_t *addr) +{ + if (isa_imp <= 1) { /* if only one isa implemented */ + target_addr_t address = (*addr & ~1) | isa_imp; + + if (address != *addr) { + LOG_USER("Warning: isa bit changed due to isa not implemented"); + *addr = address; + } + } +} extern const struct command_registration mips_m4k_command_handlers[]; #endif /* OPENOCD_TARGET_MIPS_M4K_H */ -- cgit v1.2.3-18-g5258