From 1341eb3b0aea74b939a5d7702f696b175d032647 Mon Sep 17 00:00:00 2001 From: drath Date: Sun, 30 Jul 2006 11:25:43 +0000 Subject: - added configurable delays after reset lines get deasserted. useful if reset circuitry keeps lines asserted for too long. - additional debug output when opening the parallel port - fixed counting of available arm7/9 watchpoint units - 'flash write' now displays elapsed time git-svn-id: svn://svn.berlios.de/openocd/trunk@79 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/jtag/jtag.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/jtag/jtag.h') diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h index 124150ce..f7630a5e 100644 --- a/src/jtag/jtag.h +++ b/src/jtag/jtag.h @@ -199,6 +199,9 @@ enum jtag_event JTAG_TRST_RELEASED, }; +extern int jtag_trst; +extern int jtag_srst; + typedef struct jtag_event_callback_s { int (*callback)(enum jtag_event event, void *priv); -- cgit v1.2.3-18-g5258