From f132fcf636361009b4125827351ef01556d49b31 Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Mon, 30 Sep 2013 13:31:57 +0400 Subject: Clean up many C99 integer types format specifiers This eliminates most of the warnings reported when building for arm-none-eabi (newlib). Hsiangkai, there're many similar warnings left in your nds32 files, I didn't have the nerve to clean them all, probably you could pick it up. Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810 Signed-off-by: Paul Fertser Reviewed-on: http://openocd.zylin.com/1674 Tested-by: jenkins Reviewed-by: Spencer Oliver --- src/flash/nand/lpc32xx.c | 10 +++++----- src/flash/nor/at91sam3.c | 14 +++++++------- src/flash/nor/at91sam4.c | 14 +++++++------- src/flash/nor/cfi.c | 2 +- src/flash/nor/core.c | 2 +- src/flash/nor/efm32.c | 12 ++++++------ src/flash/nor/fm3.c | 4 ++-- src/flash/nor/kinetis.c | 18 +++++++++--------- src/flash/nor/lpc2000.c | 2 +- src/flash/nor/lpcspifi.c | 6 +++--- src/flash/nor/nuc1x.c | 6 +++--- src/flash/nor/stm32f2x.c | 6 +++--- src/flash/nor/stm32lx.c | 7 ++++--- src/flash/nor/stmsmi.c | 2 +- src/flash/nor/tcl.c | 10 +++++----- 15 files changed, 58 insertions(+), 57 deletions(-) (limited to 'src/flash') diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c index 1776b309..38c7e335 100644 --- a/src/flash/nand/lpc32xx.c +++ b/src/flash/nand/lpc32xx.c @@ -1040,8 +1040,8 @@ static int lpc32xx_write_page_slc(struct nand_device *nand, int retval; uint32_t target_mem_base; - LOG_DEBUG("SLC write page %x data=%d, oob=%d, " - "data_size=%d, oob_size=%d", + LOG_DEBUG("SLC write page %" PRIx32 " data=%d, oob=%d, " + "data_size=%" PRIu32 ", oob_size=%" PRIu32, page, data != 0, oob != 0, data_size, oob_size); target_mem_base = pworking_area->address; @@ -1451,7 +1451,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, int retval; uint32_t target_mem_base; - LOG_DEBUG("SLC read page %x data=%d, oob=%d", + LOG_DEBUG("SLC read page %" PRIx32 " data=%" PRIu32 ", oob=%" PRIu32, page, data_size, oob_size); target_mem_base = pworking_area->address; @@ -1558,7 +1558,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, retval = nand_correct_data(nand, data + 256*i, &fecc[i * 3], &ecc[i * 3]); if (retval > 0) - LOG_WARNING("error detected and corrected: %d/%d", + LOG_WARNING("error detected and corrected: %" PRIu32 "/%d", page, i); if (retval < 0) break; @@ -1566,7 +1566,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand, if (i == ecc_count) retval = ERROR_OK; else { - LOG_ERROR("uncorrectable error detected: %d/%d", page, i); + LOG_ERROR("uncorrectable error detected: %" PRIu32 "/%d", page, i); retval = ERROR_NAND_OPERATION_FAILED; } return retval; diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index 6fe71bfb..fdae9645 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -2333,7 +2333,7 @@ static uint32_t sam3_reg_fieldname(struct sam3_chip *pChip, } /* show the basics */ - LOG_USER_N("\t%*s: %*d [0x%0*x] ", + LOG_USER_N("\t%*s: %*" PRIu32 " [0x%0*" PRIx32 "] ", REG_NAME_WIDTH, regname, dwidth, v, hwidth, v); @@ -2558,10 +2558,10 @@ static void sam3_explain_ckgr_mcfr(struct sam3_chip *pChip) v = (v * pChip->cfg.slow_freq) / 16; pChip->cfg.mainosc_freq = v; - LOG_USER("(%3.03f Mhz (%d.%03dkhz slowclk)", + LOG_USER("(%3.03f Mhz (%" PRIu32 ".%03" PRIu32 "khz slowclk)", _tomhz(v), - pChip->cfg.slow_freq / 1000, - pChip->cfg.slow_freq % 1000); + (uint32_t)(pChip->cfg.slow_freq / 1000), + (uint32_t)(pChip->cfg.slow_freq % 1000)); } static void sam3_explain_ckgr_plla(struct sam3_chip *pChip) @@ -2831,7 +2831,7 @@ static int sam3_GetInfo(struct sam3_chip *pChip) /* display all regs */ LOG_DEBUG("Start: %s", pReg->name); regval = *sam3_get_reg_ptr(&(pChip->cfg), pReg); - LOG_USER("%*s: [0x%08x] -> 0x%08x", + LOG_USER("%*s: [0x%08" PRIx32 "] -> 0x%08" PRIx32, REG_NAME_WIDTH, pReg->name, pReg->address, @@ -2847,7 +2847,7 @@ static int sam3_GetInfo(struct sam3_chip *pChip) LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq)); LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq)); - LOG_USER(" UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x", + LOG_USER(" UniqueId: 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32, pChip->cfg.unique_id[0], pChip->cfg.unique_id[1], pChip->cfg.unique_id[2], @@ -3002,7 +3002,7 @@ static int sam3_GetDetails(struct sam3_bank_private *pPrivate) LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can ID this chip?)", (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR)); /* Help the victim, print details about the chip */ - LOG_INFO("SAM3 CHIPID_CIDR: 0x%08x decodes as follows", + LOG_INFO("SAM3 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows", pPrivate->pChip->cfg.CHIPID_CIDR); sam3_explain_chipid_cidr(pPrivate->pChip); return ERROR_FAIL; diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c index 6c8b71e2..f34ca4f6 100644 --- a/src/flash/nor/at91sam4.c +++ b/src/flash/nor/at91sam4.c @@ -1002,7 +1002,7 @@ static uint32_t sam4_reg_fieldname(struct sam4_chip *pChip, } /* show the basics */ - LOG_USER_N("\t%*s: %*d [0x%0*x] ", + LOG_USER_N("\t%*s: %*" PRId32 " [0x%0*" PRIx32 "] ", REG_NAME_WIDTH, regname, dwidth, v, hwidth, v); @@ -1227,10 +1227,10 @@ static void sam4_explain_ckgr_mcfr(struct sam4_chip *pChip) v = (v * pChip->cfg.slow_freq) / 16; pChip->cfg.mainosc_freq = v; - LOG_USER("(%3.03f Mhz (%d.%03dkhz slowclk)", + LOG_USER("(%3.03f Mhz (%" PRIu32 ".%03" PRIu32 "khz slowclk)", _tomhz(v), - pChip->cfg.slow_freq / 1000, - pChip->cfg.slow_freq % 1000); + (uint32_t)(pChip->cfg.slow_freq / 1000), + (uint32_t)(pChip->cfg.slow_freq % 1000)); } static void sam4_explain_ckgr_plla(struct sam4_chip *pChip) @@ -1479,7 +1479,7 @@ static int sam4_GetInfo(struct sam4_chip *pChip) /* display all regs */ LOG_DEBUG("Start: %s", pReg->name); regval = *sam4_get_reg_ptr(&(pChip->cfg), pReg); - LOG_USER("%*s: [0x%08x] -> 0x%08x", + LOG_USER("%*s: [0x%08" PRIx32 "] -> 0x%08" PRIx32, REG_NAME_WIDTH, pReg->name, pReg->address, @@ -1495,7 +1495,7 @@ static int sam4_GetInfo(struct sam4_chip *pChip) LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq)); LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq)); - LOG_USER(" UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x", + LOG_USER(" UniqueId: 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08"PRIx32, pChip->cfg.unique_id[0], pChip->cfg.unique_id[1], pChip->cfg.unique_id[2], @@ -1619,7 +1619,7 @@ static int sam4_GetDetails(struct sam4_bank_private *pPrivate) LOG_ERROR("SAM4 ChipID 0x%08x not found in table (perhaps you can ID this chip?)", (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR)); /* Help the victim, print details about the chip */ - LOG_INFO("SAM4 CHIPID_CIDR: 0x%08x decodes as follows", + LOG_INFO("SAM4 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows", pPrivate->pChip->cfg.CHIPID_CIDR); sam4_explain_chipid_cidr(pPrivate->pChip); return ERROR_FAIL; diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index c443de2d..2ade84a8 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -2307,7 +2307,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u } if (count) { - LOG_INFO("Fixup %d unaligned read tail bytes", count); + LOG_INFO("Fixup %" PRIu32 " unaligned read tail bytes", count); /* read a complete word from flash */ retval = target_read_memory(target, read_p, bank->bus_width, 1, current_word); diff --git a/src/flash/nor/core.c b/src/flash/nor/core.c index e61b3032..cc2ecac0 100644 --- a/src/flash/nor/core.c +++ b/src/flash/nor/core.c @@ -595,7 +595,7 @@ int flash_write_unlock(struct target *target, struct image *image, if (retval != ERROR_OK) goto done; if (c == NULL) { - LOG_WARNING("no flash bank found for address %x", run_address); + LOG_WARNING("no flash bank found for address %" PRIx32, run_address); section++; /* and skip it */ section_offset = 0; continue; diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c index be9f8eea..eab11333 100644 --- a/src/flash/nor/efm32.c +++ b/src/flash/nor/efm32.c @@ -292,7 +292,7 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr) int ret = 0; uint32_t status = 0; - LOG_DEBUG("erasing flash page at 0x%08x", addr); + LOG_DEBUG("erasing flash page at 0x%08" PRIx32, addr); ret = target_write_u32(bank->target, EFM32_MSC_ADDRB, addr); if (ERROR_OK != ret) @@ -307,13 +307,13 @@ static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr) if (ERROR_OK != ret) return ret; - LOG_DEBUG("status 0x%x", status); + LOG_DEBUG("status 0x%" PRIx32, status); if (status & EFM32_MSC_STATUS_LOCKED_MASK) { LOG_ERROR("Page is locked"); return ERROR_FAIL; } else if (status & EFM32_MSC_STATUS_INVADDR_MASK) { - LOG_ERROR("Invalid address 0x%x", addr); + LOG_ERROR("Invalid address 0x%" PRIx32, addr); return ERROR_FAIL; } @@ -681,13 +681,13 @@ static int efm32x_write_word(struct flash_bank *bank, uint32_t addr, if (ERROR_OK != ret) return ret; - LOG_DEBUG("status 0x%x", status); + LOG_DEBUG("status 0x%" PRIx32, status); if (status & EFM32_MSC_STATUS_LOCKED_MASK) { LOG_ERROR("Page is locked"); return ERROR_FAIL; } else if (status & EFM32_MSC_STATUS_INVADDR_MASK) { - LOG_ERROR("Invalid address 0x%x", addr); + LOG_ERROR("Invalid address 0x%" PRIx32, addr); return ERROR_FAIL; } @@ -747,7 +747,7 @@ static int efm32x_write(struct flash_bank *bank, uint8_t *buffer, "for padding buffer"); return ERROR_FAIL; } - LOG_INFO("odd number of bytes to write (%d), extending to %d " + LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " " "and padding with 0xff", old_count, count); memset(buffer, 0xff, count); buffer = memcpy(new_buffer, buffer, old_count); diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c index 86e4cb24..70114da6 100644 --- a/src/flash/nor/fm3.c +++ b/src/flash/nor/fm3.c @@ -195,7 +195,7 @@ static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms) } if (retval == ERROR_OK) - LOG_DEBUG("fm3_busy_wait(%x) needs about %d ms", offset, ms); + LOG_DEBUG("fm3_busy_wait(%" PRIx32 ") needs about %d ms", offset, ms); return retval; } @@ -557,7 +557,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer, } if (buf_get_u32(reg_params[5].value, 0, 32) != ERROR_OK) { - LOG_ERROR("Fujitsu MB9[A/B]FXXX: Flash programming ERROR (Timeout) -> Reg R3: %x", + LOG_ERROR("Fujitsu MB9[A/B]FXXX: Flash programming ERROR (Timeout) -> Reg R3: %" PRIx32, buf_get_u32(reg_params[5].value, 0, 32)); retval = ERROR_FLASH_OPERATION_FAILED; break; diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index 51e7676f..59750db0 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -553,12 +553,12 @@ static int kinetis_write(struct flash_bank *bank, uint8_t *buffer, /* fallback to longword write */ fallback = 1; LOG_WARNING("Kinetis L Series supports Program Longword execution only."); - LOG_DEBUG("flash write into PFLASH @08%X", offset); + LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset); } else if (kinfo->flash_class == FC_FLEX_NVM) { uint8_t ftfx_fstat; - LOG_DEBUG("flash write into FlexNVM @%08X", offset); + LOG_DEBUG("flash write into FlexNVM @%08" PRIX32, offset); /* make flex ram available */ result = kinetis_ftfx_command(bank, FTFx_CMD_SETFLEXRAM, 0x00ff0000, 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat); @@ -579,7 +579,7 @@ static int kinetis_write(struct flash_bank *bank, uint8_t *buffer, LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)", buf[0]); } } else { - LOG_DEBUG("flash write into PFLASH @08%X", offset); + LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset); } @@ -632,8 +632,8 @@ static int kinetis_write(struct flash_bank *bank, uint8_t *buffer, (void) memcpy(residual_buffer, &buffer[i+4*wc], residual_bc); } - LOG_DEBUG("write section @ %08X with length %d bytes", - offset + i, wc*4); + LOG_DEBUG("write section @ %08" PRIX32 " with length %" PRIu32 " bytes", + offset + i, (uint32_t)wc*4); /* write data to flexram as whole-words */ result = target_write_memory(bank->target, FLEXRAM, 4, wc, @@ -678,7 +678,7 @@ static int kinetis_write(struct flash_bank *bank, uint8_t *buffer, "for padding buffer"); return ERROR_FAIL; } - LOG_INFO("odd number of bytes to write (%d), extending to %d " + LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " " "and padding with 0xff", old_count, count); memset(buffer, 0xff, count); buffer = memcpy(new_buffer, buffer, old_count); @@ -698,7 +698,7 @@ static int kinetis_write(struct flash_bank *bank, uint8_t *buffer, for (i = 0; i < count; i += 4) { uint8_t ftfx_fstat; - LOG_DEBUG("write longword @ %08X", offset + i); + LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i)); uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff}; memcpy(padding, buffer + i, MIN(4, count-i)); @@ -753,7 +753,7 @@ static int kinetis_read_part_info(struct flash_bank *bank) return result; fcfg2_pflsh = (kinfo->sim_fcfg2 >> 23) & 0x01; - LOG_DEBUG("SDID: 0x%08X FCFG1: 0x%08X FCFG2: 0x%08X", kinfo->sim_sdid, + LOG_DEBUG("SDID: 0x%08" PRIX32 " FCFG1: 0x%08" PRIX32 " FCFG2: 0x%08" PRIX32, kinfo->sim_sdid, kinfo->sim_fcfg1, kinfo->sim_fcfg2); fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f); @@ -821,7 +821,7 @@ static int kinetis_read_part_info(struct flash_bank *bank) break; } - LOG_DEBUG("FlexNVM: %d PFlash: %d FlexRAM: %d PFLSH: %d", + LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d", nvm_size, pf_size, ee_size, fcfg2_pflsh); if (kinfo->klxx) num_blocks = 1; diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c index aadb9999..c0c7e41e 100644 --- a/src/flash/nor/lpc2000.c +++ b/src/flash/nor/lpc2000.c @@ -485,7 +485,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo result_table[3] = target_buffer_get_u32(target, mem_params[1].value + 0x10); LOG_DEBUG("IAP command = %i (0x%8.8" PRIx32 ", 0x%8.8" PRIx32 ", 0x%8.8" PRIx32 ", 0x%8.8" PRIx32 ", 0x%8.8" PRIx32 - ") completed with result = %8.8" PRIx32, + ") completed with result = %8.8x", code, param_table[0], param_table[1], param_table[2], param_table[3], param_table[4], status_code); destroy_mem_param(&mem_params[0]); diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c index 0c12e641..dc964b90 100644 --- a/src/flash/nor/lpcspifi.c +++ b/src/flash/nor/lpcspifi.c @@ -199,7 +199,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank) return retval; } - LOG_DEBUG("Writing algorithm to working area at 0x%08x", + LOG_DEBUG("Writing algorithm to working area at 0x%08" PRIx32, spifi_init_algorithm->address); /* Write algorithm to working area */ retval = target_write_buffer(target, @@ -715,7 +715,7 @@ static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer, LOG_WARNING("Working area size is limited; flash writes may be"\ " slow. Increase working area size to at least %zdB"\ " to reduce write times.", - sizeof(lpcspifi_flash_write_code) + page_size + (size_t)(sizeof(lpcspifi_flash_write_code) + page_size) ); else if (fifo_size > 0x2000) /* Beyond this point, we start to get diminishing returns */ fifo_size = 0x2000; @@ -947,7 +947,7 @@ static int get_lpcspifi_info(struct flash_bank *bank, char *buf, int buf_size) } snprintf(buf, buf_size, "\nSPIFI flash information:\n" - " Device \'%s\' (ID 0x%08x)\n", + " Device \'%s\' (ID 0x%08" PRIx32 ")\n", lpcspifi_info->dev->name, lpcspifi_info->dev->device_id); return ERROR_OK; diff --git a/src/flash/nor/nuc1x.c b/src/flash/nor/nuc1x.c index a5a14c8b..da88134d 100644 --- a/src/flash/nor/nuc1x.c +++ b/src/flash/nor/nuc1x.c @@ -410,7 +410,7 @@ static int nuc1x_write(struct flash_bank *bank, uint8_t *buffer, /* program command */ for (i = 0; i < count; i += 4) { - LOG_DEBUG("write longword @ %08X", offset + i); + LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i)); uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff}; memcpy(padding, buffer + i, MIN(4, count-i)); @@ -495,7 +495,7 @@ static int nuc1x_probe(struct flash_bank *bank) } if (!(NuMicroParts[i].partno == 0x00000000)) { LOG_INFO("DeviceID : 0x%08" PRIx32 "", device_id); - LOG_INFO("Detect %s%CN!", NuMicroParts[i].partname, ('A'+(device_id>>28))); + LOG_INFO("Detect %s%cN!", NuMicroParts[i].partname, (char)('A'+(device_id>>28))); } else { LOG_INFO("No NUC Device Detected..."); return ERROR_FAIL; @@ -552,7 +552,7 @@ static int get_nuc1x_info(struct flash_bank *bank, char *buf, int buf_size) } if (!(NuMicroParts[i].partno == 0x00000000)) { LOG_INFO("DeviceID : 0x%08" PRIx32 "", device_id); - LOG_INFO("Detect %s%CN!", NuMicroParts[i].partname, ('A'+(device_id>>28))); + LOG_INFO("Detect %s%cN!", NuMicroParts[i].partname, (char)('A'+(device_id>>28))); } else { LOG_INFO("No NUC Device Detected..."); return ERROR_FAIL; diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index a7aba2b3..1dee6230 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -258,7 +258,7 @@ static int stm32x_unlock_reg(struct target *target) return retval; if (ctrl & FLASH_LOCK) { - LOG_ERROR("flash not unlocked STM32_FLASH_CR: %x", ctrl); + LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl); return ERROR_TARGET_FAILURE; } @@ -290,7 +290,7 @@ static int stm32x_unlock_option_reg(struct target *target) return retval; if (ctrl & OPT_LOCK) { - LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: %x", ctrl); + LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: %" PRIx32, ctrl); return ERROR_TARGET_FAILURE; } @@ -589,7 +589,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, LOG_ERROR("flash memory write protected"); if (error != 0) { - LOG_ERROR("flash write failed = %08x", error); + LOG_ERROR("flash write failed = %08" PRIx32, error); /* Clear but report errors */ target_write_u32(target, STM32_FLASH_SR, error); retval = ERROR_FAIL; diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c index 70414cdc..d36e518e 100644 --- a/src/flash/nor/stm32lx.c +++ b/src/flash/nor/stm32lx.c @@ -598,14 +598,15 @@ static int stm32lx_probe(struct flash_bank *bank) /* This is the first bank */ flash_size_in_kb = first_bank_size_in_kb; } else { - LOG_WARNING("STM32L flash bank base address config is incorrect. 0x%x but should rather be 0x%x or 0x%x", + LOG_WARNING("STM32L flash bank base address config is incorrect." + " 0x%" PRIx32 " but should rather be 0x%" PRIx32 " or 0x%" PRIx32, bank->base, base_address, second_bank_base); return ERROR_FAIL; } - LOG_INFO("STM32L flash has dual banks. Bank (%d) size is %dkb, base address is 0x%x", + LOG_INFO("STM32L flash has dual banks. Bank (%d) size is %dkb, base address is 0x%" PRIx32, bank->bank_number, flash_size_in_kb, base_address); } else { - LOG_INFO("STM32L flash size is %dkb, base address is 0x%x", flash_size_in_kb, base_address); + LOG_INFO("STM32L flash size is %dkb, base address is 0x%" PRIx32, flash_size_in_kb, base_address); } /* if the user sets the size manually then ignore the probed value diff --git a/src/flash/nor/stmsmi.c b/src/flash/nor/stmsmi.c index 3c186fdd..9a715ef9 100644 --- a/src/flash/nor/stmsmi.c +++ b/src/flash/nor/stmsmi.c @@ -638,7 +638,7 @@ static int get_stmsmi_info(struct flash_bank *bank, char *buf, int buf_size) } snprintf(buf, buf_size, "\nSMI flash information:\n" - " Device \'%s\' (ID 0x%08x)\n", + " Device \'%s\' (ID 0x%08" PRIx32 ")\n", stmsmi_info->dev->name, stmsmi_info->dev->device_id); return ERROR_OK; diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c index 5bc0958b..916ebf73 100644 --- a/src/flash/nor/tcl.c +++ b/src/flash/nor/tcl.c @@ -74,7 +74,7 @@ COMMAND_HANDLER(handle_flash_info_command) return retval; command_print(CMD_CTX, - "#%" PRIu32 " : %s at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32 + "#%d : %s at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32 ", buswidth %i, chipwidth %i", p->bank_number, p->driver->name, @@ -236,7 +236,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command) retval = flash_erase_address_range(target, do_pad, address, length); if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { - command_print(CMD_CTX, "erased address 0x%8.8x (length %i)" + command_print(CMD_CTX, "erased address 0x%8.8" PRIx32 " (length %" PRIi32 ")" " in %fs (%0.3f KiB/s)", address, length, duration_elapsed(&bench), duration_kbps(&bench, length)); } @@ -294,7 +294,7 @@ COMMAND_HANDLER(handle_flash_erase_command) if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) { command_print(CMD_CTX, "erased sectors %" PRIu32 " " - "through %" PRIu32 " on flash bank %" PRIu32 " " + "through %" PRIu32 " on flash bank %d " "in %fs", first, last, p->bank_number, duration_elapsed(&bench)); } @@ -332,7 +332,7 @@ COMMAND_HANDLER(handle_flash_protect_command) retval = flash_driver_protect(p, set, first, last); if (retval == ERROR_OK) { command_print(CMD_CTX, "%s protection for sectors %i " - "through %i on flash bank %" PRIu32 "", + "through %i on flash bank %d", (set) ? "set" : "cleared", (int) first, (int) last, p->bank_number); } @@ -818,7 +818,7 @@ COMMAND_HANDLER(handle_flash_banks_command) unsigned n = 0; for (struct flash_bank *p = flash_bank_list(); p; p = p->next, n++) { - LOG_USER("#%" PRIu32 " : %s (%s) at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32 ", " + LOG_USER("#%d : %s (%s) at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32 ", " "buswidth %u, chipwidth %u", p->bank_number, p->name, p->driver->name, p->base, p->size, p->bus_width, p->chip_width); -- cgit v1.2.3-18-g5258