From cdba6ba0ad63d256f896c834b03732a5eefc7a13 Mon Sep 17 00:00:00 2001 From: Matthias Welwarsky Date: Thu, 10 Nov 2016 20:33:02 +0100 Subject: cortex_a: fix reset for SWD transport Change b0698501b0e789091e9f9f1427b32af304888769 fixed reset for i.MX6 and TI Sitara SoCs but broke reset for cortex-a targets that use SWD. This patch is a work- around that forces asserting SRST when SWD is used. Change-Id: I7e39f2a469b9b4b2b74ad48ba49f2eeb58528921 Signed-off-by: Matthias Welwarsky Reviewed-on: http://openocd.zylin.com/3641 Tested-by: jenkins Reviewed-by: Paul Fertser --- src/target/cortex_a.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index ed2f6137..d0eac751 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -54,6 +54,7 @@ #include "target_type.h" #include "arm_opcodes.h" #include "arm_semihosting.h" +#include "jtag/swd.h" #include static int cortex_a_poll(struct target *target); @@ -1867,9 +1868,15 @@ static int cortex_a_assert_reset(struct target *target) /* REVISIT handle "pulls" cases, if there's * hardware that needs them to work. */ - if (target->reset_halt) - if (jtag_get_reset_config() & RESET_SRST_NO_GATING) - jtag_add_reset(0, 1); + + /* + * FIXME: fix reset when transport is SWD. This is a temporary + * work-around for release v0.10 that is not intended to stay! + */ + if (transport_is_swd() || + (target->reset_halt && (jtag_get_reset_config() & RESET_SRST_NO_GATING))) + jtag_add_reset(0, 1); + } else { LOG_ERROR("%s: how to reset?", target_name(target)); return ERROR_FAIL; -- cgit v1.2.3-18-g5258