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2019-04-24target/imx8m: Cleanup defaultsLeonard Crestez
* Add mem_ap for direct access to axi bus (without halting cpu) * Mark m4 core with -defer-examine because it's not used by default * Make a53.0 default target since it's the boot core Change-Id: Id031533c5d4af346eb08a9ac2532fa1bca602913 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5036 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24target/imx6ul: Initial supportLeonard Crestez
Unlike the rest of imx6 the 6UL 6ULL 6ULZ chips are based on Cortex-A7 which is at a different address so a custom script is required. Tested on imx6ull-14x14-evk Change-Id: I72822d2241045c318389fadbc66d7aaabaaf4cb5 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5040 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24target/imx6sx: Initial supportLeonard Crestez
Unlike the rest of imx6 a Cortex-M4 was added with a second CoreSight DAP so a separate script is required. Tested on imx6sx-sdb running linux Change-Id: I1561910b233015f42508f341175822c0827655ec Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5041 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24target/imx7ulp: Initial supportLeonard Crestez
Unlike imx7d/solo supported by imx7.cfg the M4 core is on a different AP and is always running by default so no -defer-examine is required. There is also only one Cortex-A7 Tested on imx7ulp-evk Change-Id: Ifa923d1b9a372c788e6654bc2233fd4d9073a32d Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5043 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24tcl/board: Add config for the Amazon Kindle 2 and DXAlexander Kurz
Add a config to access the Amazon Kindle Model No. D00701 and D00801. Both ebook readers are based on a Freescale i.MX31. A JTAG interface is included in a 40 pin FFC connector marked "J9" on both variants. Change-Id: I58bb1ded3d6706bc3798af488ca8bafb7dc45225 Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3956 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10target/imx6: Update list of supported TAPIDsLeonard Crestez
Copy all SJC TAPIPs from imx6 reference manuals. Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4 and need separate scripts. Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5034 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10target/imx6: Fix indentation in DAP_TAPID handlingLeonard Crestez
OpenOCD scripts are usually indented with 4 spaces but here there are 8. Change-Id: Iaad53e3b377d246d99119bb7bb5fd75d4422f564 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5039 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10target/imx6: Add -ignore-versionLeonard Crestez
Looking through imx6 manuals all of them claim that "In follow-on silicon revisions the ID value is subject to change by incrementing the first nibble". Handle this by passing -ignore-version to jtag newtap command. Change-Id: I7fc4779f9757d527ea20a5174a8c90f919580013 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5031 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10target/imx7: Add ahb mem_apLeonard Crestez
This allows bus access even when CPU is off. Change-Id: I2d5c5581cd0169aecb92ac7b610810988a8dcef4 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5032 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-09topic: Remapped Flash over ITCM region in STM32F7x scriptRocco Marco Guglielmi
This patch remaps the Flash over ITCM region as virtual to ensure that any breakpoint placed in this area will be automatically set as an hardware breakpoint. This patch is a fix to a regression introduced with changes #4429. Change-Id: I03d46d8537ef06b33a3d4a2328274667c6481969 Signed-off-by: Rocco Marco Guglielmi <roccomarco.guglielmi@gmail.com> Reviewed-on: http://openocd.zylin.com/5097 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins
2019-03-27smp: replace commands smp_on/smp_off with "smp [on|off]"Antonio Borneo
Seams over-engineered having two separate commands to turn SMP on/off. Plus it is missing the possibility to dump the current status of SMP and would be weird adding an additional command for it. Moreover, such commands are replicated in few targets so it would make sense centralizing them. - Deprecate the commands "smp_on" and "smp_off". - Add a new command "smp" that accepts optional parameters "[on|off]" and prints the SMP status when run without parameters. This replaces the two commands above. - Put the deprecated and the new command handlers in smp.c - Update the documentation, except for mips_m4k, since it is not available yet. - Promote the macro foreach_smp_target to global context and use it where possible. Change-Id: Ia72841c1a3bd6edd4db4cc809046322f498617e6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4615 Tested-by: jenkins Reviewed-by: Graham Sanderson <graham.sanderson@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27imx8m: add an m4 target to the imx8mAngus Ainslie
The imx8m also has a Cortex m4 so add a target for it. Change-Id: I2abf62b6232c547fe9b12507f459835b11c63a6d Signed-off-by: Angus Ainslie <angus@akkea.ca> Reviewed-on: http://openocd.zylin.com/4501 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-27flash: stm32f2/f4/f7: Add One-Time-Porgrammable (OTP) supportMoritz Fischer
The OTP is part of the flash memory. It has 512 (1024 for F7) bytes and is organized in 16 sectors with 32 (64 for F7) bytes each. The OTP is exposed as separate flash bank 1 and can be used with the usual flash commands. Writing the OTP can be done as follows: > stm32f2x otp 1 enable > flash write bank 1 foo.bin 0 > mdw 0x1fff7800 4 > verify_image foo.bin 0x1fff7800 > stm32f2x otp 1 disable Note: This patch is largely a rebase/cleanup of a patch from 2012 by Laurent Charpentier and he did most of the work. No new Clang-Analyzer warnings. Change-Id: I5e6371f6a7c7a9929c1d7907d6ba4724f9d20d97 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/829 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-05flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51Tomas Vanek
The new Microchip (former Atmel) series powered by Cortex-M4 looks very similar to older M0+ powered SAM D2x at the first sight. Unfortunately the new series differs a lot in important details. NVMCTRL has different register addresses, moved important bits and even changed binary command set. An universal driver for all SAM D/E would be very complicated. That's why a new driver was derived. Tested on Microchip SAM E54 Xplained Pro kit (board cfg included). Adjusted for the restructured dap support. Checked by valgrind and clang static analyzer. Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4272 Tested-by: jenkins Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
2019-01-26tcl: Support for Analog Devices ADSP-SC58x / ADSP-SC584-EZBRDPeter Lawrence
The original script was broken by changes to the Cortex-A code. The recent introduction of the mem_ap target provided a new mechanism to allow the script to be fixed. This also adds an example board script for the ADSP-SC584-EZBRD. Change-Id: I36bc1ac6b6c036539f4175f1e65223ba10a35355 Signed-off-by: Peter Lawrence <majbthrd@gmail.com> Reviewed-on: http://openocd.zylin.com/4855 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-23Correct ZynqMP configuration to be appropriately namedJonathan McDowell
The xilinx_ultrascale.cfg target is actually the configuration for a ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad core A53. Update the filename/comments to reflect this, and include the tap IDs for all known FPGA cores for this part. Change-Id: I70dfcc99861a482b83b6a795e83021d9cf1fe047 Signed-off-by: Jonathan McDowell <noodles@earth.li> Reviewed-on: http://openocd.zylin.com/4850 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-08icepick.cfg: add cancel reset bit to TAP register writesEdward Fewell
The Agama family of devices (CC26x2/CC13x2) required an additional bit to be set when adding the core's TAP into the scan chain. The cancel reset bit 0x10000 tells the ICEPick to take the bus out of reset so that the other bits will take effect. This bit is a NOP on other devices and ICEPicks, so the change shouldn't adversely affect other devices. Change-Id: I9245eef0936ea7eea28ae84ab5e8ce05fa63af40 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4789 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-02NOR: lpc2000 Add support for LPC84x devicesRod Boyce
These devices differ from LPC8xx devices in that they have a different IAP entry point, but everything else is the same. Using Tcl to pass different IAP entry point. no new Clang analyser warnings and no new build sanitizers issues. Change-Id: I2d654dd250f416e74262c0228cad8713a283402f Signed-off-by: Rod Boyce <developer@teamboyce.co.uk> Reviewed-on: http://openocd.zylin.com/4684 Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02flash: nor: ath79: remove base calculationOleksij Rempel
Currently it is impossible to flash ELF with correct offsets. The reason is a bogus offset calculation extracted from base. Since any other spi drivers do not care about base, do the same for ath79 as well. Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4821 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23Add LPC8Nxx and NHS3xx support.Jean-Christian de Rivaz
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1 Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Reviewed-on: http://openocd.zylin.com/4515 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12fix cc32xx related changesJiri Kastner
original CC3200 launchpad works only with ti-icdi driver which stopped to work after merging to master commit d02de3a8a92091b9761ebaf44dff1a71f5b2edcb Change-Id: I247b5d99831fa744de1fdc5b8a7cffdf49fe953c Signed-off-by: Jiri Kastner <cz172638@gmail.com> Reviewed-on: http://openocd.zylin.com/4792 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-11flash/nor: update CC26xx/CC13xx supportEdward Fewell
Added fixes found in additional code reviews. Remove inappropriate use of bank_number field and updated documentation to reflect the change. Restored functionality to cc2538.cfg file because previous change removed the cc26xx.cfg file because the flash support changes made it obsolete. Rolled the previous cc26xx.cfg file into cc2538.cfg and updated it to work with other recent changes. Tested using a SmartRF06 Evaluation board with embedded XDS100v3 and external XDs110. Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4787 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-06stlink: add support for STLINK-V3Antonio Borneo
Extend the driver to include the minimal functionality to support the HLA model. Due to the small change in the name (ST-LINK/V2 => STLINK-V3), fix the existing names in the comments in udev rules. Change-Id: Ied33e38063a6da81d9bf249ed195444d7cdf4f03 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4717 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06stlink: add usb pid for v2.1 without mass storage deviceAntonio Borneo
New version of ST-Link/V2.1 without mass storage device. From debug point of view, it is compatible with existing ST-Link/V2.1 It uses a new USB PID because the USB endpoints and interfaces are different from usual ST-Link/V2.1 Add the new PID in the driver, in the tcl interface script and in the udev configuration script. Change-Id: Id2e1b5a5d0347c5d951a86a9cdb76be52cfd4ea3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4702 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06mem_helper: add mrh commandSteven Stallion
This patch adds support for reading halfword values from memory. This command compliments existing support for writing halfwords (mwh). Change-Id: I8ec628e65c05a7f00aa57e3af0f228eb8bd4d14e Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4781 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-11-26tcl/target, board: remove useless gdb-attach event definitionsTomas Vanek
Since commit bae76053dc515252dc5c8235b9a848e461080c66 gdb-attach event is defined as halt by default. Remove useless and in case of bcm281xx wrong definitions of the event. Change-Id: I8e69780a93722eb9392673303f54d502e71eceb6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4763 Tested-by: jenkins Reviewed-by: Steven Stallion <sstallion@gmail.com>
2018-11-20tcl/target: ti_tms570.cfg restructure dap supportTomas Vanek
ti_tms570 was probably omitted in commit 2231da8ec4e7d7ae9b652f3dd1a7104f5a110f3f Change-Id: Idd4828fd5ea3641bda6c73c7f07a598c1e512ef6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4762 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-18target/stm32f7x: clarify reset_config commentChristopher Head
The reset_config line in the config file does not actually set connect_assert_srst (the default is connect_deassert_srst), but it reads as if it does. Clarify that the target is compatible with connect_assert_srst, without suggesting that the file actually sets it to that value. Change-Id: I14e9445ab282d386b5d0055f6adf03d7c8878a8c Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4743 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-10target/stm32h7x: Fix documentation of reset_configChristopher Head
The stm32h7x.cfg does not specify connect_assert_srst or connect_deassert_srst in its reset_config. The comment claims that it will therefore connect in reset. However, per the manual, the default configuration is actually connect_deassert_srst, not connect_assert_srst. In actual fact, connect_assert_srst does not work on the STM32H7 because, while SRST is asserted, everything on the AXI bus is inaccessible. The CPU core is accessible, but since the examine-end event handler also pokes at the DBGMCU peripheral, that will fail in connect_assert_srst mode. So using connect_deassert_srst is appropriate, so fix the comment accordingly. Change-Id: If3e32e871fb19cc61183bdf911b7c5efd80b62e2 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4741 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-10-31tcl: target: omit apcsw for hlaPaul Fertser
When using stlink for CM7 targets we have to rely on its firmware to do the right thing as direct DAP access is not possible. Change-Id: Ieee69f4eeea5c911f89f060f31ce86ed043bdfd0 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4732 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-10-27zynq_7000: Add zynqpl_program commandMoritz Fischer
This allows for programming the PL part of the Xilinx Zynq 7000 Change-Id: I89e86c0f381951091f6948c46802d17d7f1f3500 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/4177 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-27xilinx-xc7: Add additional IDCODEs.William D. Jones
Add/detect missing IDCODEs for the Spartan 7 family and Artix 25T and Artix 12T. Change-Id: Ib6c83c5592e90df1eb8e715e79b279da9a95f9c6 Signed-off-by: William D. Jones <wjones@wdj-consulting.com> Reviewed-on: http://openocd.zylin.com/4428 Reviewed-by: Robert Jördens Tested-by: jenkins Reviewed-by: Rohit Singh <rohit91.2008@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-27tcl/board: Add Arty-S7 Spartan 7 FPGA Development BoardWilliam D. Jones
Change-Id: I8bfe780cb67a1777d5112a68e8a9781bfe4f2038 Signed-off-by: William D. Jones <wjones@wdj-consulting.com> Reviewed-on: http://openocd.zylin.com/4525 Reviewed-by: Robert Jordens <jordens@gmail.com> Tested-by: jenkins Reviewed-by: Rohit Singh <rohit91.2008@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-17tcl: Add support for the Numato Lab Mimas A7 boardRohit Singh
The Mimas A7 FPGA board has FTDI FT2232 whose channel B is connected to Artix-7 FPGA's JTAG interface. Hence, OpenOCD can easily interface with it via the its ftdi driver interface. Tested to be working great up to 30 MHz. Change-Id: Ieda015fbc6135bf95ad5a069cbf38650da45911e Signed-off-by: Rohit Singh <rohit91.2008@gmail.com> Reviewed-on: http://openocd.zylin.com/4720 Tested-by: jenkins Reviewed-by: Tim "mithro" Ansell <me@mith.ro> Reviewed-by: Robert Jordens <jordens@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-10-16esirisc: support eSi-RISC targetsSteven Stallion
eSi-RISC is a highly configurable microprocessor architecture for embedded systems provided by EnSilica. This patch adds support for 32-bit targets and also includes an internal flash driver and uC/OS-III RTOS support. This is a non-traditional target and required a number of additional changes to support non-linear register numbers and the 'p' packet in RTOS support for proper integration into EnSilica's GDB port. Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4660 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-01tcl/board: Add Renesas R-Car Salvator-X(S) boards.Adam Bass
Add configuration for the Renesas R-Car Salvator-X and Renesas R-Car Salvator-XS boards. Change-Id: I898008f56adb31908d30760f18217583fabf1c51 Signed-off-by: Adam Bass <adam.bass@renesas.com> Reviewed-on: http://openocd.zylin.com/4670 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-01tcl/target: Add Renesas R-Car Gen3 targetsAdam Bass
Add configuration for the Renesas R-Car Generation 3 targets. These are SoCs with Cortex A57s, A53s, and R7s. All cores are supported. Change-Id: I795233210e4f647a1a2a0adea7c058ae98b5db70 Signed-off-by: Adam Bass <adam.bass@renesas.com> Reviewed-on: http://openocd.zylin.com/4669 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-27target/atsamv: make APCSW cacheableChristopher Head
Change-Id: Ic00d3192642c682f370a6f7f8b70ae29744eb746 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4678 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-27target/stm32: make APCSW cacheableChristopher Head
Change-Id: I7c5c9720ded329848647f17db95f845e46c01c19 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4674 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-12tcl/board: Add Emcraft imx8 SOM BSB supportGuido Günther
Tested with Olimex ARM-USB-TINY-H adapter Simple commands work fine but there are currently issues when attaching remote gdb or running virt2phys: https://sourceforge.net/p/openocd/tickets/201/ Change-Id: I86ccf1d93c5d23870bb522f92b3e2af190d529e8 Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-on: http://openocd.zylin.com/4646 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-10interface: adapter configuration for FTDI C232HMSteven Stallion
This patch adds support for the C232HM-DDSL-0 and C232HM-EDSL-0 FT232H-based cables from FTDI. For more information, see: http://www.ftdichip.com/Products/Cables/USBMPSSE.htm Change-Id: Ic97423eb1e2f6b5ebae04943cd5cce86f38771d5 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4081 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-21max32xxx: Support for MAX32XXX devices.Kevin Gillespie
Adding flash programming support for Maxim Integrated MAX32XXX devices. Change-Id: I5b0f57a885f9d813240e4bc2d9f765b743e1cfc3 Signed-off-by: Kevin Gillespie <kgills@gmail.com> Reviewed-on: http://openocd.zylin.com/3543 Tested-by: jenkins Reviewed-by: Ismail H. KOSE <ihkose@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-08-14tcl/board: update all uses of interface/stlink-v2-1 to interface/stlinkCody P Schafer
Change-Id: I5e27e84d022f73101376e8b4a1bdc65f58fd348a Signed-off-by: Cody P Schafer <openocd@codyps.com> Reviewed-on: http://openocd.zylin.com/4456 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-02tcl/target: add Allwinner V3s SoC supportOleksij Rempel
Change-Id: I2459d2b137050985b7301047f9651951d72d9e9e Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4427 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-08-02tcl/target/stm32f0x: Allow overriding the Flash bank sizeDominik Peklo
Copy & paste from another stm32 target. Change-Id: I0f6cbcec974ce70c23c1850526354106caee1172 Signed-off-by: Dominik Peklo <dom.peklo@gmail.com> Reviewed-on: http://openocd.zylin.com/4575 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-31target|board: Add Intel (Altera) Arria 10 target and related boardOleksij Rempel
Target information about this SoC can be found here: https://www.altera.com/products/fpga/arria-series/arria-10/overview.html Achilles Instant-Development Kit Arria 10 SoC SoM: https://www.reflexces.com/products-solutions/development-kits/arria-10/achilles-instant-development-kit-arria-10-soc-som Change-Id: Id78c741be6a8b7d3a70f37d41088e47ee61b437a Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4583 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31fpga/altera-10m50: add all device idOleksij Rempel
add all currently know Intel (Alter) MAX 10 device ids Change-Id: I6a88fef222c8e206812499d41be863c3d89fa944 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4598 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31tcl/board: add DPTechnics DPT-Board-v1Oleksij Rempel
it is Atheros AR9331 based IoT dev board. Change-Id: I6fc3cdea1bef49c53045018ff5acfec4d5610ba6 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4424 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31tcl/target/atheros_ar9331: add documentation and extra helpersOleksij Rempel
Sync it with experience gathered on Qualcomm QCA4531 SoC. This chips are in many ways similar. Change-Id: I06b9c85e5985a09a9be3cb6cc0ce3b37695d2e54 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4423 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31tcl/target/atheros_ar9331: add DDR2 helperOleksij Rempel
this helper works on many different boards, so it is good to have it in target config Change-Id: I068deac36fdd73dbbcedffc87865cc5b9d992c1d Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4422 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-17 05:27:43 +0000