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2009-11-04JTAG: support KT-LINK adapterKrzysztof Kajstura
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-04PXA255: support Intel "Lubbock" platformDavid Brownell
Config for Intel's "Lubbock" PXA255 development board. Even more so than the PXA255 itself, this is obsolete. AFAIK this was the first generally available development platform for PXA255. Intel stopped providing these after other devel boards became available. One interesting thing about this board from the OpenOCD perspective is probably its flash configuration. Each bank is 32 bits wide, built from two 16-bit StrataFlash chips wired in parallel. This doubles throughput ... it reads/writes 32 bits in the time a single chip takes to write just 16 bits. This conf mostly works, given XScale bugfixes, but has some issues (notably: no access to the on-board SDRAM) flagged by FIXMEs. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-01remove "-ircapture 0x1 -irmask 0x1" from stm32.cfgFreddie Chopin
Gets rid of the runtime warning "stm32.bs: nonstandard IR mask" [dbrownell@users.sourceforge.net: line lengths, note issue, section ref] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-31target.cfg: use $_TARGETNAME for flashFreddie Chopin
This gets rid of runtime warnings from the use of numbers. STM32 and LPC2103 were tested. Other LPC updates are the same, and so are safe. The CFI updates match other tested changes now in the tree. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-29Olimex FT2232H JTAG adaptersDimitar Dimitrov
Add interface configs for two new high speed JTAG adapters from Olimex. They need some other speed related tweaks to work well at high speed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-27Signalyzer: H2 and H4 supportOleg Seiljus
This patch includes partial support for these new JTAG adapters. More complete support will require updates to the libftdi code, for EEPROM access. [dbrownell@users.sourceforge.net: fix whitespace, linelen, etc ] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-27Signalyzer: new config filesOleg Seiljus
Add configs for H2, H4, LITE. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-26PXA255: force reset configDavid Brownell
These chips need both SRST and TRST when debugging, and SRST doesn't gate JTAG.
2009-10-26omap3530: target reset/init improvementsDavid Brownell
Now I can issue "reset halt" and have everything act smoothly; the vector_catch hardware is obviously not kicking in, but the rest of the reset sequence acts sanely. - TAP "setup" event enables the DAP, not omap3_dbginit (resolving a chicken/egg bug I noted a while back) - Remove stuff from omap3_dbginit which should never be used in event handlers - Cope better with slow clocking during reset Also, stop hard-wiring the target name: use the input params in the standard way, and set up $_TARGETNAME as an output param. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-26Fix incorrect line endingsSpencer Oliver
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2009-10-26balloon3 board base configWookey
This is the very basic board config for the balloon3 board cpu JTAG channel. The rest of the config comprises another 14 .cfg files which I suspect openocd doesn't really want all of. I'm still not sure how to deal with this. I'll post another mail/patch to discuss. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-25fix syntax of mww phys.Øyvind Harboe
2009-10-21mww_phys retired. Replaced by generic mww phys in target.cØyvind Harboe
2009-10-20Added the faux flash driver and target. Used for testing.Øyvind Harboe
2009-10-19davinci: add watchdog reset methodDavid Brownell
Lightly tested on dm365. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-18SDRAM and clock configuration for the SAM9-L9260 board from OlimexDean Glazeski
2009-10-14Fw: [PATCH] OpenRD board configurationWookey
Ofrwarded from Ron, who's not subscribed. ----- Forwarded message from Ron <ron@debian.org> ----- From: Ron <ron@debian.org> Date: Wed, 14 Oct 2009 04:50:17 +1030 To: wookey@debian.org Subject: [PATCH] OpenRD board configuration X-Spam-Status: No, score=-3.6 required=4.5 tests=BAYES_00,RCVD_IN_DNSWL_LOW autolearn=ham version=3.2.5 This piggybacks on the 'sheevaplug' layout which uses the same Kirkwood SoC. Signed-off-by: Ron Lee <ron@debian.org>
2009-10-14iMX target config script's ported from Freescale BSP.Øyvind Harboe
2009-10-14omap2420.cfg updatesDavid Brownell
Remove ircapture/mask attributes. Add "srst_nogate". Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-13arm11 seems to gate JTAG when srst is assertedØyvind Harboe
2009-10-12Xilinx xcr3256.cfg basic config scriptWookey
2009-10-12burst writes work fine. clean up junk.Øyvind Harboe
2009-10-12Merge commit 'origin/master'Øyvind Harboe
2009-10-12Supply default reset_config statement to make target scripts useful ↵Øyvind Harboe
standalone and provide sensible default
2009-10-10Fix reset delays and tinker with ID'sWookey
2009-10-09Merge commit 'origin/master'Øyvind Harboe
2009-10-09Added tip in documentation on how to translate quirky syntaxØyvind Harboe
2009-10-08make PXA255 targets enumerate sort-of-OKDavid Brownell
Startup now mostly works, except that the initial target state is "unknown" ... previously, it refused to even start. Getting that far required fixing the ircapture value (which can never have been correct!) and the default JTAG clock rate, then providing custom reset script. The "reset" command is still iffy. DCSR updates, and loading the debug handler, report numerous DR/IR capture failures. But once that's done, "poll" reports that the CPU is halted (which it shouldn't be, this was "reset run"!), due to the rather curious reason "target-not-halted". Summary: you still can't debug these parts, but it's closer. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-08Function to flash SheevaPlug u-boot sectorsRabeeh Khoury
This function is used by the SheevaPlug installer to flash the erase and re-flash the U-Boot environment in the NAND Flash.
2009-10-08initial builds of OSK5912 boards need srst_pulls_trstDavid Brownell
This is clearly noted in the hardware spec (section 5.2.3); it works around a chip erratum: "If the MPU_RESET signal is used, it may cause the EMIFS bus to lock." I seem to have a board with such an initial build. The chip is labeled XOMAP. Presumably, parts without that "X" prefix (eXperimental) resolve this. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07make OMAP5912 resets more reliableDavid Brownell
Without some extra delay after releasing SRST, we seemed to be trying to talk to the TAP before it was ready to respond. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07iMX25 target supportJohn Rigby
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07first stab at imx35 reset init scriptoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2817 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-07remove recrusive reset invocation from reset init callbackoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2816 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06Add basic support for DM6446 EVM board.dbrownell
git-svn-id: svn://svn.berlios.de/openocd/trunk@2808 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06Dragonite target scriptdbrownell
From: Nicolas Pitre <nico@fluxnic.net> git-svn-id: svn://svn.berlios.de/openocd/trunk@2806 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06stop using targetnumoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2804 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05Add a new JTAG "setup" event; use for better DaVinci ICEpick support.dbrownell
The model is that this fires after scanchain verification, when it's safe to call "jtag tapenable $TAPNAME". So it will fire as part of non-error paths of "init" and "reset" command processing. However it will *NOT* trigger during "jtag_reset" processing, which skips all scan chain verification, or after verification errors. ALSO: - switch DaVinci chips to use this new mechanism - log TAP activation/deactivation, since their IDCODEs aren't verified - unify "enum jtag_event" scripted event notifications - remove duplicative JTAG_TAP_EVENT_POST_RESET git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05Get rid of needless OMAP and Davinci target config optionsdbrownell
so they provide better examples and are easier to maintain. git-svn-id: svn://svn.berlios.de/openocd/trunk@2797 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-02Updated reset event handling in omap3530 cfgmlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2796 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30Remove annoying EOL whitespace (again, sigh).dbrownell
git-svn-id: svn://svn.berlios.de/openocd/trunk@2781 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30strip gdb config optionsoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2779 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30michal smulski <michal.smulski@ooma.com> reset now worksoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2778 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-27Don't provide invalid OMAP5912 IR capture value/mask attributesdbrownell
git-svn-id: svn://svn.berlios.de/openocd/trunk@2762 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-26On DM355 EVM board, associate NAND chips with $_TARGETNAMEdbrownell
instead of a target number. git-svn-id: svn://svn.berlios.de/openocd/trunk@2761 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-25Update DM355 target config to know about ICEpick.dbrownell
Still defaults to nonstandard EMU0/EMU1 settings. git-svn-id: svn://svn.berlios.de/openocd/trunk@2757 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-25Michael Hasselberg <mh@open-engineering.de> target configuration files for ↵oharboe
Toshiba TX09 familiy git-svn-id: svn://svn.berlios.de/openocd/trunk@2756 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21Remove annoying end-of-line whitespace from tcl/* filesdbrownell
git-svn-id: svn://svn.berlios.de/openocd/trunk@2743 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21Ethan Eade <ethan@evolution.com> board config script for Cogent CSB732 ↵oharboe
i.MX35 (arm1136) git-svn-id: svn://svn.berlios.de/openocd/trunk@2741 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21Ensure that DaVinci chips can't start with a too-fast JTAG clock.dbrownell
It can be sped up later, once it's known the PLLs are active. Note that modern tools from TI all use adaptive clocking; and that if that's done with OpenOCD, "too fast" is also a non-issue. git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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