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2010-11-05CortexA8: Introduce Freescale i.MX51 variantMarek Vasut
This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU has the Debug Access Port located at a different address (0x60008000) than TI OMAP3 series of CPUs. i.MX51 configuration file based on OMAP3 configuration file and an email from Alan Carvalho de Assis <acassis@gmail.com>. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-25Make systesetreq typos read sysresetreq insteadPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se>
2010-10-25Remove srst_pulls_trst from LPC1768 targetPeter Stuge
srst_pulls_trst may be true on some (broken) LPC1768 boards but is not true in general for the LPC1768. Signed-off-by: Peter Stuge <peter@stuge.se>
2010-10-10swj-dp.tcl (SWD infrastructure #1)David Brownell
Provide new helper proc that can set up either an SWD or JTAG DAP based on the transport which is in use -- mostly for SWJ-DP. Also update some SWJ-DP based chips/targets to use it. The goal is making SWD-vs-JTAG transparent in most places. SWJ-DP based chips really need this flexible configuration to cope with debug adapters that support different transports, without needing new target configs for each transport or adapter. For JTAG-DP, callers will use "jtag newtap" directly, as today; only one chip-level transport option exists. For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly (part of an upcoming SWD transport patch). Again, only one transport option exists, so hard-wiring is appropriate there. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-09-26Fix omap3_dbginit to write to physical memory.Zachary T Welch
Setting the OMAP3530 DBGEN bit must be done in physical memory, so update omap3_dbginit callback to use the new 'mww phys' command syntax.
2010-09-21TCL scripts: collect duplicated proceduresAntonio Borneo
TCL procedures mrw and mmw, originally in DaVinci target code, are duplicated in other TCL scripts. Moved in a common helper file, and added help/usage description. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-09-20AM/DM37x: Unify configuration scripts and add support for TI Beagleboard xM.Karl Kurbjun
2010-09-14board scripts: Marvell PXA270M processor has a new TAPID: 0x89265013Takács Áron
the new Marvell PXA270M processor has a new TAPID: 0x89265013. Attached you will find a patch for target/pxa270.cfg that will handle this. I have also attached a board/colibri.cfg file to support the Colibri PXA270 module by Toradex. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-31cortex m3: add cortex_m3 reset_config cmdSpencer Oliver
This new cmd adds the ability to choose the Cortex-M3 reset method used. It defaults to using SRST for reset if available otherwise it falls back to using NVIC VECTRESET. This is known to work on all cores. Move any luminary specific reset handling to the stellaris cfg file. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-08-31cfg: update Luminary config filesSpencer Oliver
- Update all Luminary config's to use a common target/stellaris.cfg. - Add Luminary ek-lm3s6965 config. - Increase working area for boards with more ram. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-08-19imx35pdk: fix clock and reset delaysØyvind Harboe
Use rclk and 100ms delay on ntrst Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-17mcb1700: Keil MCB1700 w/1768 config scriptØyvind Harboe
Ca. 93kBytes/s flashing speed @ 10MHz JTAG clock Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-15avr32: basic target scriptOleksandr Tymoshenko
2010-08-15at32ap7000 config fileDavid Brownell
nice board to play with.
2010-08-13lpc1768: turn down the jtag clockØyvind Harboe
Tests should that it needs to be as low as 100kHz to be stable. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-12DM36x: Set OSCDIV dividerThomas Koeller
The ability to set up the OSCDIV divider was missing. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12DM36x: Disable unused SYSCLKsThomas Koeller
Clear the enable bits for all clocks that are not set explicitly. This is done to increase robustness by removing pre-existing state. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12DM36x: Use enable bit for PLL pre-dividerThomas Koeller
The PLL pre- and postdividers seem to have enable bits, although these are not mentioned in the chip documentation. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-11tcl: remove silly ocd_ prefix to array2mem and mem2arrayØyvind Harboe
ocd_ prefix is used internally in OpenOCD as a kludge more or less to deal with the two kinds of commands that OpenOCD has. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11config scripts: remove useless reference to OpenOCD docsØyvind Harboe
clutters config scripts. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-10cfg: add omapl138 support and da850evm preliminary supportBen Gardiner
This patch adds support for the omapl138 target and preliminary support for the da850evm. The target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file. I have performed limited testing with this setup. I am posting this patch in the interest of sharing cfg files and in the hopes that the experts on this list can correct errors I have made or point out enhancements. The testing I have performed is debugging uboot with gdb where I also use the following local.cfg and gdbinit files. Debugging appears to work in so much as 'ni' works. local.cfg: gdb_memory_map disable gdbinit: target remote localhost:3333 set remote hardware-breakpoint-limit 2 set remote hardware-watchpoint-limit 2 monitor poll on Comments welcome. Best Regards, Ben Gardiner
2010-08-02lpc1768: even if rclk "works", it isn't necessarily the correct clkØyvind Harboe
rclk = 4MHz oon lpc1768, the correct JTAG clk is 666MHz(4MHz/6). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-01Remove srst_pulls_trst from LPC2148 targetPeter Stuge
srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact which is already documented in doc/openocd.texi, so it shouldn't be set unconditionally in the target tcl. This patch was needed to reflash when an Abort exception occured very early after reset, before OpenOCD tried to halt the CPU.
2010-07-30lpc7168: make flash available upon reset initØyvind Harboe
set user mode to avoid ROM being mapped at address 0 rather than flash. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-17lm3s811-ek uses generic stellaris target configDavid Brownell
There's no point in an lm3s811-specific target file, so remove it in favor of the generic "stellaris.cfg". Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-07-13cfg: add Avalue RSC-W910 configSpencer Oliver
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-06-25at91sam3s* supportOlaf Lüke
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15DM36x: pll & clock setupThomas Koeller
Added a function 'pll_v03_setup' to set up PLLs and clock dividers on DM365 and DM368. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15arm1136 scriptsmichal smulski
Here is a patch to fix a startup in C100 (arm1136). Basically make sure that UART is configured before using it. Michal Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-26cfg: add pic32 virtual banksSpencer Oliver
make use of the new virtual bank flash driver. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24There are no variants of arm7tdmi targetFreddie Chopin
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24All LPC2xxx chips are little endian and that cannot be changed - update ↵Freddie Chopin
config scripts Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24add correct CPUTAPID value for LPC2129Freddie Chopin
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24Update "flash bank" helper comments for LPC2xxx chipsFreddie Chopin
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24LPC23xx and LPC24xx after reset run on internal 4MHz RC oscillator, so ↵Freddie Chopin
"flash bank" parameter should be 4000 (not 12000) Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-21at91sam9260: use RCLKØyvind Harboe
It might be possible to get this target going without RCLK, but it would require more careful analysis and usage of the reset events. Enable fast memory accesses. Tested on an at91sam9260 custom board w/external DRAM and flash. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18at91rm9200 : reset_config should go to the board config fileMarc Pignat
Let other boards do other things with srst and trst. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-13scripts: update flash bank namesSpencer Oliver
As the flash bank name is now unique update the scripts to suit. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-04-24telo: update configuration scripts to matched master branchmichal smulski
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-26TCL scripts: update to current "flash bank" syntaxAntonio Borneo
While "flash bank" syntax has been changed long ago, several tcl script are still not fully update. Fix following cases related with "cfi" driver: - syntax error: the mandatory <name> parameter is missing - warning: the <target> parameter is a number, instead of the target name - the comment line above the command does not report actual syntax Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-16PIC32: add Microchip Explorer16 cfgSpencer Oliver
- add Microchip Explorer16 cfg using PIC32MX360F512L PIM. - remove reset config from PIC32 target cfg. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-15rename jtag_nsrst_assert_width as adapter_nsrst_assert_widthDavid Brownell
Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15rename jtag_nsrst_delay as adapter_nsrst_delayDavid Brownell
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15rename jtag_khz as adapter_khzDavid Brownell
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. (We may want to update it to include a nag message too.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15PIC32MX: update cfg scriptSpencer Oliver
The default config script will now dynamically setup the BMX registers in the reset init script. This will also work if the user overrides the default working area. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10PIC32: add flash algorithm supportSpencer Oliver
Add flash algorithm support for the PIC32MX. Still a few things todo but this dramatically decreases the programing time, eg. approx programming for 2.5k test file. - without fastload: 60secs - with fastload: 45secs - with fastload and algorithm: 2secs. Add new devices to supported list. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-02LPC1768 updates, IAR board supportDavid Brownell
Fix some issues with the generic LPC1768 config file: - Handle the post-reset clock config: 4 MHz internal RC, no PLL. This affects flash and JTAG clocking. - Remove JTAG adapter config; they don't all support trst_and_srst - Remove the rest of the bogus "reset-init" event handler. - Allow explicit CCLK configuration, instead of assuming 12 MHz; some boards will use 100 Mhz (or the post-reset 4 MHz). - Simplify: rely on defaults for endianness and IR-Capture value - Update some comments too Build on those fixes to make a trivial config for the IAR LPC1768 kickstart board (by Olimex) start working. Also, add doxygen to the lpc2000 flash driver, primarily to note a configuration problem with driver: it wrongly assumes the core clock rate never changes. Configs that are safe for updating flash after "reset halt" will thus often be unsafe later ... e.g. for LPC1768, after switching to use PLL0 at 100 MHz. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-27Add target/mc13224v.cfgMariano Alvira
The MC13224V is a FreeScale ARM7TDMI based IEEE802.15.4 platform for Zigbee and similar low-power wireless applications. Using PIP (Platform In Package) technology, it integrates: an RF balun and matching network; a buck converter (only an external inductor is necessary); 96KB of SRAM; and 128KB of non-volatile memory. It has an integrated bootloader and can boot from a variety of sources: external SPI or I2C non-volatile memory, an image loaded over UART1, or the internal non-volatile memory. The image loaded from one of these sources is executed directly from SRAM starting at location 0x00400000. Open source development code at http://mc1322x.devl.org Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-15LPC1768.cfg -- partial fixes for bogus reset-init handlerDavid Brownell
Cortex-M targets don't support ARM instructions. Leave the NVIC.VTOR setup alone, but comment how the whole routine looks like one big bug... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-11target library: configuration files for openocd tested with Atmel SAM-ICE V6 ↵Viktar Palstsiuk
JTAG. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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