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2013-12-14tcl/target: add config for Milandr's 1986ве1т controllerPaul Fertser
This is a Cortex-M1 controller targetting aviation appliances. Contributed (and live-tested) by 8daemon. Change-Id: I133d6122cf6492b51ddbdbd800c16ba121d51bf3 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1818 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-14topic: Support for the Xilinx BSCAN_* Virtual JTAG in OpenriscSergio Chico
This add support to the Xilinx BSCAN_* virtual JTAG interface. This is the Xilinx equivalent of the Altera sld_virtual_jtag interface, it allows a user to connect to the debug unit through the main FPGA JTAG connection. Change-Id: Ia438e910650cff9cbc8f810b719fc1d5de5a8188 Signed-off-by: Sergio Chico <sergio.chico@gmail.com> Reviewed-on: http://openocd.zylin.com/1806 Tested-by: jenkins Reviewed-by: Franck Jullien <franck.jullien@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-14stm32lx_dual_bank.cfg: fix typo in file pathAndrey Yurovsky
s/stm32l1x/stm32lx ...this makes tm32lx_dual_bank.cfg work again. Change-Id: I04dc617523caa6b46c675fe9b700d1bbe88170e6 Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com> Reviewed-on: http://openocd.zylin.com/1832 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-11-06add TI TMS570 support scriptsAndrey Yurovsky
Add support for the TMS570 Cortex-R4 MCU from TI and their USB stick development kit, TMDX570LS31USB. Tested attaching, reset/halt/run, and reading and writing memory and registers. Change-Id: I12d779cef0c2b834f9bcf722307f35677cc4bd8f Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-on: http://openocd.zylin.com/1788 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-29Remove jtag_rclk from target configsPaul Fertser
Some boards might have RCLK omitted from the JTAG connector and if the interface claims support for it, OpenOCD will end up trying to use RCLK while it's actually impossible. This is a "cd tcl/target; sed -i s/jtag_rclk/adapter_khz/g *" patch. Change-Id: Iee7337107bc1457966b104389ba9db75a9c860b4 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1695 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2013-10-21armada370: initial support for Marvell Armada 370 familyGreg Ungerer
Initial support for using the jtag interface to the Marvell Armada 370 family of SoCs. Change-Id: Id823a567e8805ac622c3c330bc111297c1dae37e Signed-off-by: Greg Ungerer <gerg@uclinux.org> Reviewed-on: http://openocd.zylin.com/1690 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-26Add new target type: OpenRISCFranck Jullien
Add support for OpenRISC target. This implementation supports the adv_debug_sys debug unit core. The mohor dbg_if is not supported. Support for mohor TAP core and Altera Virtual JTAG core are also provided. Change-Id: I3b1cfab1bbb28e497c4fca6ed1bd3a4362609b72 Signed-off-by: Franck Jullien <franck.jullien@gmail.com> Reviewed-on: http://openocd.zylin.com/1547 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-08-29cfg: EFM32 supports SYSRESETREQ so use itSpencer Oliver
Change-Id: If52fdea025a2f9620ad4ddacfb83cbb83a94944d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1541 Tested-by: jenkins
2013-08-29efm32: set safe minimum working areaSpencer Oliver
The smallest available RAM size for this family is 2K, set this as the default. Issue reported by quitte on IRC. Change-Id: I3318f7f268f7681ffe2cddab61820f4b94c4e5fd Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1559 Tested-by: jenkins
2013-08-15Add tcl configurations for Altera Soc devicesBrad Riensche
This commit adds two tcl configuration files, one for the Altera Cyclone V SoC series, and one for the SoCkit development board. The board configuration is able to halt and resume the cpu cores, and dump register contents etc. It has not been fully tested, however. Change-Id: Id3f18c3408975cf986a5f5aec410b5b13240c35e Signed-off-by: Brad Riensche <brad.riensche@gmail.com> Reviewed-on: http://openocd.zylin.com/1494 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07mdr32fx: support for Milandr's MDR32Fx internal flash memoryPaul Fertser
This adds example config and flash driver for russian Cortex-M3 microcontroller model. Run-time tested on MDR32F9Q2I evaluation board; the flash driver should be compatible with MDR32F2x (Cortex-M0) too but I lack hardware to test. There're no status bits at all, the datasheets specifies some delays for flash operations instead. All being in <100us range, they're hard to violate with JTAG, I hope. There're also no flash identification registers so the flash size and type has to be hardcoded into the config. The flashing is considerably complicated because the flash is split into pages, and each page consists of 4 interleaved non-consecutive "sectors" (on MDR32F9 only, MDR32F2 is single-sectored), so the fastest way is to latch the page and sector address and then write only the part that should go into the current page and current sector. Performance testing results with adapter_khz 1000 and the chip running on its default HSI 8MHz oscillator: When working area is specified, a target helper algorithm is used: wrote 131072 bytes from file testfile.bin in 3.698427s (34.609 KiB/s) This can theoretically be sped up by ~1.4 times if the helper algorithm is fed some kind of "loader instructions stream" to allow sector-by-sector writing. Pure JTAG implementation (when target memory area is not available) flashes all the 128k memory in 49.5s. Flashing "info" memory region is also implemented, but due to the overlapping memory addresses (resulting in incorrect memory map calculations for GDB) it can't be used at the same time, so OpenOCD needs to be started this way: -c "set IMEMORY true" -f target/mdr32f9q2i.cfg It also can't be read/verified because it's not memory-mapped anywhere ever, and OpenOCD NOR framework doesn't really allow to provide a custom handler that would be used when verifying. Change-Id: I80c0632da686d49856fdbf9e05d908846dd44316 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1532 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-01imx6: add new id for SJC as found on i.MX6DPaul Fertser
Austriancoder on IRC reports getting this ID on his board. Change-Id: Ie859f0ee422e18fdb94bf817cdd2b41d15b968da Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1533 Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-15target: Pull out the jtag_rtck from iMX5x filesMarek Vasut
Pull the jtag_rtck setting from imx51.cfg and imx53.cfg . Since not all boards using these CPUs do support RTCK signal, move the configuration of RTCK into board files. Change-Id: I632c5d38e00ada8779a451cd26428fd122452001 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/1460 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-06-12stm32w: add STM32w108xx generic configurationGiuseppe Barba
Add generic TCL configuration for STM STM108Wxx chips. Change-Id: I981cdccb78833f442c3be4188c8c023064067e4e Signed-off-by: Giuseppe Barba <giuseppe.barba@gmail.com> Reviewed-on: http://openocd.zylin.com/1439 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-12str9: ignore boundary scan versionSpencer Oliver
Ignore version of Boundary Scan TAP in newer revisions of the str9. Change-Id: I6e205f8c731f07078c469e686025857c180f3a6d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1436 Tested-by: jenkins
2013-06-05nds32: add new target type nds32_v2, nds32_v3, nds32_v3mHsiangkai Wang
Add target code for Andes targets. Change-Id: Ibf0e1b61b06127ca7d9ed502d98d7e2aeebbbe82 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1259 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-28targets: fix target_type name for Cortex-A targetsPaul Fertser
Commit d9ba56c295f057e716519a798bf9cdb4898c24f4 did a bunch of renaming of cortex_a8 to cortex_a, including the names in config files. However that introduced a regression as the name in target_type struct remained unchanged. This adds the last missing bit: actual renaming of the target name as understood by OpenOCD. Also change the (hopefully) last instance of using it in the supplied config files, namely from imx6.cfg. Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1420 Tested-by: jenkins Reviewed-by: Chris Johns <chrisj@rtems.org> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-10stm32 configs: use 4kB working area size by defaultPaul Fertser
This is needed for configs that might be used with the cheapest STM32F100 parts that have only 4kB SRAM. Restrictions for the other STM32 families are verified to be set appropriately. Change-Id: I1ad2370435015604db9f27c1a76c153480311a28 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1378 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-02cfg: remove whitespaceSpencer Oliver
Change-Id: I20edbb50efc03711195102f4c6dc8bcfaf043d44 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1374 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-05-02cfg: ignore ICEPick jrc tap versionSpencer Oliver
Due to reports of newer targets using a updated version of the ICEPick tap rather than add another tapid we ignore the tap version. Also see Trac 49 for details. Change-Id: Ic78414c54af2545c817e1bb2c860970c1b587259 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1373 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-28target: rename cortex_a8 to cortex_aSpencer Oliver
Rename cortex_a8 target to use a more correct cortex_a name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: I0eb1429c9281321efeb444b27a662a941a2ab67f Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1130 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28target: rename cortex_m3 to cortex_mSpencer Oliver
Rename cortex_m3 target to use a more correct cortex_m name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: Ia8429f38e88da677249c5caa560c50f8ce56ea10 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1129 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21stm32f30x: Add boundary scan TAP ID to match siliconAndreas Fritiofson
Change-Id: I74ef3cfc437540aedd99da46ac3e0c6cd9c5cd8d Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1354 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-19stm32w: Added sample target configuration for STM32W108 with STLink-V2Ben Nahill
As requested, here is the target configuration that I'm using for an STLink-V2-attached STM32W108C8. For some reason, it only seems to work with "reset_config trst_only". Change-Id: Icbff4f83343e1f505d8afdfc53ff6f8b7496cac9 Signed-off-by: Ben Nahill <bnahill@gmail.com> Reviewed-on: http://openocd.zylin.com/1347 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-15cfg: Added cfg script for at91sam4sd32x targetsPeter Dietzsch
Change-Id: I3b8a54d89a180bfded3dae3f1fe3d940540e6e7d Signed-off-by: Peter Dietzsch <peter.dietzsch@ib-dt.de> Reviewed-on: http://openocd.zylin.com/1333 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-02pic32mx: 0 wait state optionSalvador Arroyo
By default pic32mx starts after any reset with 1 wait state for RAM access/exec. It can be changed to 0 wait states by clearing the BMXWSDRM bit (bit 6) in BMXCON register. With 0 wait states near doubles the execution speed. CRC check sum can be done much faster increasing verify_image speed. Fast data transfer also works with a bit higher scan rate, up to 1500 Khz. This option can be set at any time with mww 0xbf882004 0x40 or cleared with mww 0xbf882008 0x40. Some numbers for FTDI/HS with current devel code and a elf file: Core clock / wait states verify_image speed ------------------------------------|------------------------------ 4 Mhz / 1 21 KiB/s 4 Mhz / 0 36 KiB/s 8 Mhz / 1 37 KiB/s 8 Mhz / 0 57 KiB/s Change-Id: I4092ad0f3753f72f77108718d0ed3a3ab84e3b23 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1141 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2013-03-06cfg: add Netgear DG834v3 configurationSpencer Oliver
Change-Id: I3f4880d8b07b9623544b94d316b37e6d0ae97020 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1189 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-03-06cfg: add basic support of Freescale i.MX6 series targetsVladimir Zapolskiy
This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-05Change reset configuration.Mathias K
This patch change the default reset config from SYSRESETREQ to the working VECTRESET. Change-Id: I21a9a74b9c0c68cfa3a6e6dac9b123acc98a93cb Signed-off-by: Mathias K <kesmtp@freenet.de> Reviewed-on: http://openocd.zylin.com/1186 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-25stm32: add support for the STM32Lx 384kb dual bank flashJohan Almquist
This update adds support for the STM32Lx 384kb dual bank flash. Previously there was a problem when writing an image that was larger than 192Kb. That lead to openocd printing out two error messages like "Error: access denied / write protected" and "Error: invalid program address". The reason was that the stm32lx driver tried to write half pages which overlapped into the next flash bank. A new configuration file stm32lx_dual_bank.cfg can be used for stm32lx chips with dual bank flash (256kb or 384kb devices). A sanity check was added for probed flash size values to fix the issue seen on some ST samples that answered incorrectly. Change-Id: I69e25131983d88613be8606b438f98870c5f1e52 Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com> Reviewed-on: http://openocd.zylin.com/1125 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-01-14flash: EFM32 flash implementationRoman D
Limited (no page unprotect, no block writes) implementation of EFM32 flash support. Verified with EFM32 development kit and STLink V2 adapter using SWD. Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c Signed-off-by: Roman D <me@iamroman.org> Reviewed-on: http://openocd.zylin.com/1106 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-30cfg: stm32l use minimum family ram size for working areaSpencer Oliver
The smallest pert in the family has 10k RAM, so use that as a default for the working area. Change-Id: I78be0d14a254c109ac15a7163552c6132f810416 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1005 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30cfg: enable stlink stm32l HSISpencer Oliver
Switch to using the internal HSI when a reset init is called, this also matches the std stm32l cfg. Read (verify) speed is increased from 17 to 120 KiB/s. Change-Id: Ic94ba85949ffdefa17b7be45eef14e30f941d107 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1004 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-23icdi: add TI icdi interfaceSpencer Oliver
This is the new proprietary interface replacing the older FTDI based adapters. It is currently fitted to the ek-lm4f232 and Stellaris LaunchPad. Change-Id: I794ad79e31ff61ec8e9f49530aca9308025c0b60 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/922 Tested-by: jenkins
2012-12-23stlink: rename stlink cmd namesSpencer Oliver
As part of the switch to using the hla for the stlink interface we rename the cmds to a more generic name. Update scripts to match new names. Also add handlers for deprecated names. Change-Id: I6f00743da746e3aa13ce06acfdc93c8049545e07 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/921 Tested-by: jenkins
2012-12-11LPC1788 target configuration file.is2t
Change-Id: I68bd6b7c19d9d1bee13d0921c32b4490e68ab8f2 Signed-off-by: is2t <devel@is2t.com> Reviewed-on: http://openocd.zylin.com/1002 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-11-16Pic32mx.cfg: Change system clock to 8Mhz after reset-init.Salvador Arroyo
As for openocd 0.6.0-rc2 the function mips32_pracc_fastdata_xfer() should now work at a scan frequency up to 1200Khz. Mainly usefull to increase programming speed. Also verify_image should be slightly faster. Change-Id: I1e9b2be73690a4597e2f6ba069c1205026850f07 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/805 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-06Added support for NXP LPC1850 MicrocontrollerGianluca Renzi
Added a new configuration file for LPC18xx based boards, such as HitexLPC1850RevA Evaluation Board, and all other based on the same microcontroller by NXP. Change-Id: I68c3827be535b6d09a5c70b6d57191937d00354d Signed-off-by: Gianluca Renzi <gianlucarenzi@eurekelettronica.it> Reviewed-on: http://openocd.zylin.com/930 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-02cfg: fix incorrect stm32f3 TAPIDSpencer Oliver
Change-Id: Id66d4e03a77c47a49086ee753bed01b3944064e1 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/855 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29cfg: update for target's that support cortex_m AIRCR SYSRESETREQSpencer Oliver
If the target supports SYSRESETREQ make sure we use that as the default if srst is not fitted/configured. Change-Id: I24c907493134506320e69c1218702930629c1cdc Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/792 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-01added target configs for the lpc17xx devicesVandra Akos
lpc1751, lpc1752, lpc1754, lpc1756, lpc1758, lpc1759 lpc1763, lpc1764, lpc1765, lpc1766, lpc1767, lpc1768, lpc1769 Change-Id: I740b66930cd379c9390f3c1031cdbada747a6ce4 Signed-off-by: Vandra Akos <axos88@gmail.com> Reviewed-on: http://openocd.zylin.com/676 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins
2012-07-30lpc1768.cfg abstracted and moved to lpc17xx.cfgVandra Akos
- Moved variant-independent code to lpc17xx.cfg, which will be included from lpc17??.cfg files automatically. - lpc1768.cfg filled with variant-dependent code. Change-Id: I7dabe6ed7da7be640ed38c13aaaa096b8796d9a0 Signed-off-by: Vandra Akos <axos88@gmail.com> Reviewed-on: http://openocd.zylin.com/675 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-07-30cfg: remove deprecated stm32 target configsAndreas Fritiofson
These were deprecated in commit 69ac20a. Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Change-Id: I047872f8cd61b42aaca6588ab75566219e4a3f5d Reviewed-on: http://openocd.zylin.com/741 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-07-11flash: add stm32f3x supportSpencer Oliver
add support for the new stm32f3x family from stmicro: http://www.st.com/stm32f3 Change-Id: Icd1db95bb2767d9c0ecef24deefa92b4fdaa4f14 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/735 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-06-26lpc1768.cfg pulled out constants from flash init as variablesVandra Akos
Seems like an esthetic change, but it will allow easy support for other lpc17xx devices. Change-Id: I2cb953ce1afdd82f6ca65b38d5557a28416f895e Signed-off-by: Vandra Akos <axos88@gmail.com> Reviewed-on: http://openocd.zylin.com/674 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-25config: Add TI Calypso CPU configurationMathias K
This patch add the TI Calypso CPU to the configuration files. Change-Id: Ieb462960391c4a2c630d7a83699c3b6e8162ace9 Signed-off-by: Mathias K <kesmtp@freenet.de> Reviewed-on: http://openocd.zylin.com/630 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-21target: remove legacy target eventsSpencer Oliver
These events have been deprecated for a number of years, update any remaining scripts to the new events. Change-Id: Ic31ff388545ac8b3a500045699ca92c541b13f12 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/634 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins Reviewed-by: Bill Traynor <wmat@alphatroop.com>
2012-05-08cfg: increase stm32f0 default working areaSpencer Oliver
The smallest stm32f0 has 4k sram, so use this as the default. Change-Id: I9097be9608da92b1b9da504e5bacc1280c86907a Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/603 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-30cfg: allow stm32discovery parameter overrideSpencer Oliver
This enable the user or board config to override the parameters passed to stm32_stlink.cfg. Required to fix a incorrect working area bug with the stm32vldiscovery. Change-Id: I40a4f7913ff37d577d44b1f23befccf0317080a1 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/597 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-04-26topic: Added support for the SAM4S variantsOlivier Schonken
Atmel introduced 6 new Cortex-M4 processors on 2011-10-26 SAM4S16C - 1024KB flash LQFP100/BGA100 SAM4S16B - 1024KB flash LQFP64/QFN64 SAM4S16A - 1024KB flash LQFP48/QFN48 SAM4S8C - 512KB flash LQFP100/BGA100 SAM4S8B - 512KB flash LQFP64/QFN64 SAM4S8A - 512KB flash LQFP48/QFN48 The SAM4S processors still suffer from the "6 waitstates needed to program device" errata. Other relevant changes are: 1. Address of flash memory starts at 0x400000. 2. EWP (Erase page and write page) only works for the first two 8KB "sectors" 3. Because of the EWP not working for all the sectors, normal page writes have to be used. The default_flash_blank_check is used to check if lockregions should be erased. 4. The EA (Erase All) command takes 7.3s to complete. (Previous timeout was 500 ms) 5. There are 128 lockable regions of 8KB each. Implemented default blank checking, and page erase for load_image scenarios. This is to compensate for the EWP flash commands only working on the first 2 8KB sectors. Change-Id: I7c5a52b177f7849a107611fd0f635fc416cfb724 Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com> Reviewed-on: http://openocd.zylin.com/528 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-18 08:37:06 +0000