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from TI datasheets for whole cortex-r4 family added JTAG IDs
TMS570LS1227 16- and 32-Bit RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns192
0x0B95502F
16/32-Bit RISC Flash Microcontroller, TMS5703137-EP (Rev. B)
http://www.ti.com/lit/pdf/spns230
0x0D8A002F
0x2D8A002F
0x3D8A002F
RM48L952 16- and 32-Bit RISC Flash Microcontroller (Rev. B)
http://www.ti.com/lit/pdf/spns177
0x0D8A002F
0x2D8A002F
0x3D8A002F
RM46L852 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns185
0x0B95502F
RM48Lx30 16- and 32-Bit RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns176
0x0B8A002F
0x2B8A002F
0x3B8A002F
RM46Lx30 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns182
0x0B95502F
RM46Lx50 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns184
0x0B95502F
TMS570LS04x/03x 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns186
0x0B97102F
RM42L432 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns180
0x0B97102F
RM46Lx40 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/
0x0B95502F
TMS570LS12x5 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns191
0x0B95502F
RM48Lx40 16- and 32-Bit RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns175
0x0B8A002F
0x2B8A002F
0x3B8A002F
TMS570LS31x4/21x4 16- and 32-Bit RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns165
0x0B8A002F
0x2B8A002F
0x3B8A002F
TMS570LS20216/20206/10216/10206/10116/10106 16/32-Bit RISC Flash Microcontroller (Rev. F)
http://www.ti.com/lit/pdf/spns141
0x0B7B302F
TMS570LS31x5/21x5 16- and 32-Bit RISC Flash Microcontroller (Rev. B)
http://www.ti.com/lit/pdf/spns164
0x0B8A002F
0x2B8A002F
0x3B8A002F
RM48Lx50 16- and 32-Bit RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns174
0x0B8A002F
0x2B8A002F
0x3B8A002F
TMS570LS3137 16- and 32-Bit RISC Flash Microcontroller (Rev. B)
http://www.ti.com/lit/pdf/spns162
0x0B8A002F
0x2B8A002F
0x3B8A002F
TMS570LS12x4 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns190
0x0B95502F
TMS570LS1115 16- and 32-Bit RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns189
0x0B95502F
TMS570LS11x4 16- and 32-BIT RISC Flash Microcontroller (Rev. A)
http://www.ti.com/lit/pdf/spns188
0x0B95502F
Change-Id: Idf53a44851e1bb4bde4a74c64b65d4411e56da7c
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Tested-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/2123
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
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Split TMS570 target into LS31/LS21 and LS20/LS10 targets.
Board for the TMS570LS20SUSB Kit, which uses the TMS570 Cortex-R4 MCU from TI.
Tested attaching.
Change-Id: I1a69ac1ed800d0d6b7f9860c19cbd149e3e47620
Signed-off-by: Alex Ray <a@machinaut.com>
Reviewed-on: http://openocd.zylin.com/2089
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
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The TI TMS470 and TMS570 series of processors are BE-32 processors,
despite BE-32 not being supported by ARM in the Cortex-R4 core. TI
hacked in BE-32 support, which requires odd swizzling in OpenOCD to
make memory reads and writes function correctly. In particular,
without this change, OpenOCD word reads and writes had the bytes
reversed, and halfword and byte packed reads were reading garbage.
In my testing, this change fixes these problems.
Change-Id: I21dd30f4b9003f20fcc85f674ab833407bb61f74
Signed-off-by: Seth LaForge <sethml@google.com>
Reviewed-on: http://openocd.zylin.com/2064
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
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Add support for the TMS570 Cortex-R4 MCU from TI and their USB stick
development kit, TMDX570LS31USB. Tested attaching, reset/halt/run, and
reading and writing memory and registers.
Change-Id: I12d779cef0c2b834f9bcf722307f35677cc4bd8f
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1788
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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