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2018-01-25Add timeval_compare helper functionChristopher Head
Change-Id: Id75727a150912ff778a4fa32ad56467da33a6324 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4379 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25flash Kinetis: add K27 and K28 devicesTomas Vanek
Tested on FRDM-K28F. Thanks to Thomas Varghese for donating the kit. Change-Id: Idcdd8bcf992acebd19e5335f7f833356500c45dd Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4255 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2018-01-25flash Kinetis: make FCF protection more user friendlyTomas Vanek
The Flash Configuration Field on Kinetis devices requires protection because it is located in program flash space (at 0x400) and writing an improper data to it may permanently lock the device. Even an erased flash sector containing FCF engages security lock (not permanent one) on the next reset or power cycle. 'kinetis fcf_source protection' mode was introduced in the change #3562. Flash driver in this mode sets FCF immediately after sector erase to prevent unintentional security lock. To do so the driver needs to know FCF values before flash image data is actually processed. Flash protection bits are available in bank structure, FOPT can be set by 'kinetis fopt' command and securing device by FSEC is not supported. Nevertheless an inexperienced user flashed the device using an image with FCF values different from those set in OpenOCD config and concluded programming did not work as some verify errors showed. This change tries to write maximum possible from image data retaining FCF protection. Check FCF in programmed data and report if some field differs from values set by OpenOCD flash block protection and 'kinetis fopt' command. Warn user about verify errors caused by FCF protection. On devices with ECC flash (K26, K66 and KV5x) it is impossible to change already programmed FCF - it would result in an ECC error. As FCF was written just after erase in 'kinetis fcf_source protection' mode the warning issued during flash write is the only possible action. On non-ECC flash devices use cumulative flash programming to set FCF values requested in programmed image data. Use FSEC from programmed data only if it does not request a secure mode. Device can be secured only in 'kinetis fcf_source write' mode. Use FOPT from programmed data if its value was not configured in OpenOCD config by 'kinetis fopt' command. Change-Id: If65fbbd7700069f57e4ae32234dce371bff93674 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4228 Tested-by: jenkins Reviewed-by: Robert Foss <robert.foss@memcpy.io> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-25flash: nor: stm32l4x: fix warning in probePaul Fertser
Reading options word can fail, so this needs to be handled. Reported by Clang static analyzer. Change-Id: I9754cab9c4446fa2b20d4b44b0e20724d1bc1beb Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4352 Tested-by: jenkins Reviewed-by: Tim "mithro" Ansell <mithro@mithis.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25server: add safeguards against printing bogus port numberPaul Fertser
Clang static checker emits "Assigned value is garbage or undefined" warning there as it can't prove that when the socket descriptor is AF_INET/SOCK_STREAM and getsockname doesn't return an error, sin_port is guaranteed to be filled in. Pacify it by obvious means. Change-Id: I43b5e5ceb41c07d523a81b34a25490c4c5f49a70 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4350 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25target, arm_adi_v5: catch two allocation errorsTomas Vanek
Command mdw 0 0x40000000 triggers Segmentation fault on an arm. Size parameter is a nonsence that may happen e.g. if you mistype mdw instead of mww. Add checking for calloc() NULL return in mdb/h/w. Use calloc() instead of malloc() as multiplication count * sizeof(uint32_t) overflows for size >= 0x40000000. Change-Id: I968c944d863d1173ef932a7077d526fccb9381ae Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4349 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-17Fix Jim interpreter memory leakMarc Schink
Change-Id: I71d7d97e7dc315c42fc43b65cb5fcecd7bdfb581 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2959 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-16aarch64: speed up first examinationMatthias Welwarsky
Don't use atomic dap operations when not necessary. Also remove loop trying to set core power request, didn't find a platform where it actually worked and it's slowing examination down. Change-Id: I44e5c2f289f951b8f4579f08a841172404a52053 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4143 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-16aarch64: simplify mode and state handlingMatthias Welwarsky
Aarch32 and Aarch64 modes don't conflict in CPSR, no need to deconflict ARMv7-M profile modes either. Change-Id: I4c437dfa657f9e8a1da3687bc9f21435384b7881 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4144 Tested-by: jenkins Reviewed-by: Yao Qi <qiyaoltc@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-16aarch64: add 'maskisr' commandMatthias Welwarsky
Allow to configure ISR masking during single-step and add handling for stepping over WFI with ISR masked. Change-Id: I7918be7bcda6a1d9badac44fc36c59b52f662fef Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4023 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-14arm_adi_v5: added some partnumbers found in tegra 186 and tegra 210Jiri Kastner
Change-Id: Icd4137f3e266364d9728672bd2359fbd9a6c8ce9 Signed-off-by: Jiri Kastner <cz172638@gmail.com> Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/4160 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-13jtagspi: new protocol that includes transfer lengthRobert Jordens
This commit contains a rewrite of the jtagspi protocol and covers both changes in the jtagspi.c openocd driver and the bscan_spi (xilinx_bscan_spi) proxy bitstreams. The changes are as follows: 1. Always perform IR scan to ensure proper clearing of BYPASSed DRs. 2. Insert alignment cycles for all BYPASSed TAPs: The previous logic was erroneous. The delay in clock cyles from a bit written to the jtag interface to a bit read by the jtag interface is: * The number of BYPASSed TAPs before this (jtagspi) tap * The length of the jtagspi data register (1) * The number of BYPASSed TAPs before this one. I.e. it is just the number of enabled TAPs. This also gets rid of the configuration parameter DR_LENGTH. 3. Use marker bit to start spi transfer If there are TAPs ahead of this one on the JTAG chain, and we are in DR-SHIFT, there will be old bits toggled through first before the first valid bit destined for the flash. This delays the begin of the JTAGSPI transaction until the first high bit. 4. New jtagspi protocol A JTAGSPI transfer now consists of: * an arbitrary number of 0 bits (from BYPASS registers in front of the JTAG2SPI DR) * a marker bit (1) indicating the start of the JTAG2SPI transaction * 32 bits (big endian) describing the length of the SPI transaction * a number of SPI clock cycles (corresponding to 3.) with CS_N asserted * an arbitrary number of cycles (to shift MISO/TDO data through subsequent BYPASS registers) 5. xilinx_bscan_spi: clean up, add ultrascale This is tested on the following configurations: * KC705: XC7K325T * Sayma AMC: XCKU040 * Sayma AMC + RTM): XCKU040 + XC7A15T, a board with integrated FTDI JTAG adapter, SCANSTA JTAG router, a Xilinx Ultrascale XCKU040 and a Xilinx Artix 7 15T. https://github.com/m-labs/sinara/wiki/Sayma * Custom board with Lattice FPGA + XC7A35T * CUstom board with 3x XCKU115-2FLVA1517E Change-Id: I7361e9fb284ebb916302941735eebef3612aa103 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/4236 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13server/telnet: Use proper data typesMarc Schink
Change-Id: Ie7588e311fa5155d5ee73148dee3d0d931bfc7f5 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3413 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13ftdi swd: disable SWD output pin during inputPatrick Stewart
* Disables the data output pin while SWD is reading, so that a simple FTDI SWD interface can be made by connecting TCK to SWD_CLK and TDI+TDO directly to SWDIO. Enabled by setting SWDIO_OE to 0. Change-Id: I7d3b71cf3f4eea163cb320aff69ed95d219190bd Signed-off-by: Patrick Stewart <patstew@gmail.com> Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com> Reviewed-on: http://openocd.zylin.com/2274 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2018-01-13Accept 64-bit addresses in CRC requests.Tim Newsome
Change-Id: I6a3e97ae8ffb4dc2ca1197a8102cb9ba34de0a1e Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4317 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-13Support listening on port 0.Tim Newsome
When listening on port 0, the system will assign a random open port. We use this to run multiple OpenOCD instances against multiple simulators as part of regression testing. This mechanism means the various test instances don't have to coordinate to ensure they don't reuse any ports. The required changes are minimal: 1. Don't increment the port number when it's 0. 2. Print out which port was assigned by the system. Change-Id: I404c801fc405e9d8eb8420562c02e78d4db6242f Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4316 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-13ejtag: added missing instructions.Jiri Kastner
added missing instructions from latest available ejtag specification (MD00047 v6.1 at time of writting) for trace control, fast data channel and pcsample. Change-Id: I30293951611265ffc2bd896f9d3ca6b310e5cac6 Signed-off-by: Jiri Kastner <cz172638@gmail.com> Reviewed-on: http://openocd.zylin.com/3950 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13server/telnet: Handle Ctrl+A and Ctrl+EMarc Schink
Handle the Ctrl+A and Ctrl+E shortcuts which move the cursor to the beginning and end of the command line, respectively. Change-Id: I89fa5fd3c5edeb08a3f9320fda766f72ce9d7f64 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3415 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13profiling: write "correct" sample rate to gmon outputKarl Palsson
This duration vs sample count is _significantly_ closer to the truth than simply declaring the value to be 100Hz. Change-Id: Ie8d8bdf1959e1aa7cead0631cd2c86afe77d1efc Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/4221 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13hla_target: allow non-intrusive profiling on cortex-mKarl Palsson
Leverages the existing work that added profiling via DWT_PCSR. hla_target doesn't have direct access to the mem_ap for doing a bulk repeated read, but simply reading the DWT_PCSR register repeatedly is still ~2 order of magnitude faster than halt/resume. Change-Id: Ibe451aa95143694398370fdad6939cfb6191d56f Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/4220 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13cortex_m: add profiling functionSimon Schubert
Use DWT_PCSR if present (reads nonzero); otherwise do halt-and-sample pc. Signed-off-by: Simon Schubert <2@0x2c.org> Change-Id: Id2dc4665e5008cc497a2e6e6493522d038d5af42 Reviewed-on: http://openocd.zylin.com/4211 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13target: lakemon: implement assert_reset and deassert_resetFelipe Balbi
We're using an I/O port reset by default. The only board currently supported (Galileo) doesn't have SRST routed on the JTAG connector. When using 'reset halt', we must rely on Reset Break because our adapters don't have support for PREQ#/PRDY# signals. Tested with Intel Galileo GEN2. Change-Id: Ia406e31c156f8001717d5b6a08bd03f71de790d3 Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Reviewed-on: http://openocd.zylin.com/4016 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13target: quark_x10xx: miscellaneous cleanupsFelipe Balbi
Just some misc cleanups without any functional changes. It's just easier to read. Change-Id: I66bee31f297bcbdb8cc4446b774d7714fbaa7c83 Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Reviewed-on: http://openocd.zylin.com/4015 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13target: type: fix indentationFelipe Balbi
No functional changes, cleanup only Change-Id: I53c422be16d0a4ff157745d31362f6483093e5eb Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Reviewed-on: http://openocd.zylin.com/4014 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13target: lakemon: probemode entry isn't instantaneousFelipe Balbi
When testing with Intel Galileo GEN2 I have noticed a few iterations where probemode entry took a little longer. At most I had to read tapstatus twice. This patch uses a loop of up to 100 iterations to wait for tapstatus to update with PM entry results. Change-Id: I1c87d7dde715255b3fd2460d299b9493218533fc Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Reviewed-on: http://openocd.zylin.com/4013 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13target: quark_x10xx: adding missing 'static' keywordFelipe Balbi
These symbols are only used within this C source file. They don't need to be exposed to the outside. Change-Id: Idb04550ecca7f12c3fdc8c6447eeeb871961add3 Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Reviewed-on: http://openocd.zylin.com/4012 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13XCF (Xilinx platfrom flash) support.barthess
Change-Id: I4ee6db5f0abdb9fd279cc0edd13f71952a9d295d Signed-off-by: Uladzimir Pylinski <barthess@yandex.ru> Reviewed-on: http://openocd.zylin.com/3914 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13server: gdb: always print target information in multi-target setupsPaul Fertser
When multiple targets are declared, it's not always obvious which target the connection was made for, this can lead to very confusing errors. Reported by zjason on IRC. Change-Id: I52906320394e89cb6cfe82054a3f94b27c999689 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4135 Tested-by: jenkins
2018-01-13flash/startup: make program accept filenames with spaces and other charactersPaul Fertser
This should allow to process any path names excluding those that have curly braces. Change-Id: I87bf9ddede11e2b28d5826878eb1338143f73c03 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4083 Tested-by: jenkins
2018-01-13jtag: drivers: sysfsgpio, bcm2835gpio: remove requirement to have trst or srstPaul Fertser
This doesn't seem to make any sense. Change-Id: I272de0ea3c0e86cc9a798cbd864050aaa597c3f0 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3933 Tested-by: jenkins
2018-01-13target: arm: disassembler: decode v6T2 ARM MOV{W,T} instructionsPaul Fertser
Change-Id: I32cf2669b1b22d4142f30674cf918e36561a885e Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3899 Tested-by: jenkins
2018-01-13target: arm: disassembler: decode v6T2 ARM ISB instructionPaul Fertser
Change-Id: Iaaa54aee6a74f0b250b83c53e7a3fb7c17718920 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3895 Tested-by: jenkins
2018-01-13target: arm: disassembler: decode v6T2 ARM DSB instructionPaul Fertser
Change-Id: Id91b1a87d34982c72f2a8ab46564c961d1fef9dc Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3894 Tested-by: jenkins
2018-01-13target: arm: disassembler: add v5T Thumb BLX decodingPaul Fertser
Reported by thesourcerer on IRC. Change-Id: I36d4d95de176a19fdd0bf80d8b419be6ca637e98 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3893 Tested-by: jenkins
2018-01-13flash: startup.tcl: do not disable polling when not exitingPaul Fertser
Change-Id: I31b8a8b4519d65d6587207a71eb08dcee8ddd6fd Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4243 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2018-01-12stlink_usb: Changes to make connect_under_reset workAke Rehnman
Leaving mode before closing added Resolved a collision with JTAG API v1 error/status checking overwriting SWIM status bytes Change-Id: I35444ec0e6caace3e072c60085059602f4cdf0a4 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/4265 Tested-by: jenkins Reviewed-by: Philipp Klaus Krause Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-12jtag/drivers/stlink_usb : implemented and repaired SWIM supportAke Rehnman
Fixed a bug in stlink_usb_read_mem/write_mem preventing large data transfers The SWIM support in stlink_usb was basically non existent so I have implemented the missing parts. The bCBWCBLength and dCBWDataTransferLength for STLINK-V1 protocol was not correct so that was fixed. The reason for adding SWIM support is to add STM8 support for OpenOCD. I have tested the driver on: STM8 discovery board with the built-in STLINK-V1 STM8 discovery board with STLINK-V2 dongle STM32 vldiscovery board with the built-in STLINK-V1 STM32F1xxx processor with STLINK-V2 dongle Change-Id: I4aa80a92fb0226174356adaf2f8ff949920a621f Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/3952 Tested-by: jenkins Reviewed-by: Philipp Klaus Krause Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-11arm_adi_v5: fix regression from 4553abf9064fe3c0e4ea2ed29a1d2217df74ff5fTomas Vanek
Functions mem_ap_read() and mem_ap_write() incremented address even if addrinc=false. I overlooked this fact and moved mem_ap_setup_tar() set wrong addresses in no-incr mode. Fixed by preventing address increment in no-incr mode. Change-Id: I512e12a6a64e30cf6bc5bf77e3d57d35cc33e058 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Suggested-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/4326 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-09jtag/drivers/kitprog: Enable LOG_DEBUG_IOForest Crossman
Change-Id: Ic01b0acf01e18bcb2bf98c101c7b5888cdc10186 Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/4323 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-09aarch64: fix crash on single-steppingMatthias Welwarsky
Make sure to skip un-examined targets (e.g. targets with deferred examination) on single-stepping fixes bug #158 Change-Id: Ib40c6fee03079fd078bd52a84615e6f8a081d128 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4184 Tested-by: jenkins Reviewed-by: Yao Qi <qiyaoltc@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-05arm_adi_v5: reduce some CSW writesTomas Vanek
MEM-AP access through banked data registers MEM_AP_REG_BD0..3 does not increment TAR regardless of the current autoincrement mode. mem_ap_read_u32() and mem_ap_write_u32() can keep the current autoincrement mode instead of switching autoincrement off. Change-Id: Ib7ec688d3e04f1da678363cd2819ce90e8910e58 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4163 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-05arm_adi_v5: fix wrong addressing after change of CSW_ADDRINCTomas Vanek
Problem: If the same memory location is accessed alternatively by MEM-AP banked data registers without autoincrement and by standard autoincremented read/write, TAR register is not updated correctly. How to replicate: On a Cortex-M issue mdw 0xe000edf0 multiple times. When poll is on (poll reads the same memory location) only the first read is correct. 0xe000edf0: 01000000 0xe000edf0: 00000000 0xe000edf0: 20002640 0xe000edf0: 01000000 0xe000edf0: 00000000 0xe000edf0: 00000000 No problems with poll off. 0xe000edf0: 01000000 0xe000edf0: 01000000 0xe000edf0: 01000000 mem_ap_setup_tar() writes to MEM_AP_REG_TAR if requested TAR value changed or CSW_ADDRINC_... is currently active. However if an autoincremented access has been issued and autoinc switched off in CSW afterwards, TAR does not get updated. The change introduces mem_ap_update_tar_cache() which is called after queuing of any access to MEM_AP_REG_DRW. It simulates TAR increment to keep tar_value in sync with MEM_AP. Crossing tar autoincrement block boundary invalidates cached value. mem_ap_write() and mem_ap_read() do not check tar autoincrement block boundary, mem_ap_setup_tar() is called before each transfer instead. dap_invalidate_cache() is introduced to ensure invalidation of all cached values during dap_dp_init() and swd_connect() Change-Id: I815c2283d2989cffd6ea9a4100ce2f29dc3fb7b4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4162 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-01-04target aarch64: rework memory read/write to use 8/16/32 bit operationsBas Vermeulen
The existing code only used Memory Access mode to read memory, which uses 32 bit operations only. Rework the code to check the alignment/size of the read/write operation, and use the Memory Access mode to read aligned 32 bit memory. When using unaligned access, or 8 or 16 bit reads, use LDR{BHW} and STR{BHW} instead. The exception handling is still the same as it was before (meaning it breaks when things go wrong), but I can now read an 8 bit register correctly. Change-Id: I739a5ee825c0226ed4a89c32895cc2a047b8dc15 Signed-off-by: Bas Vermeulen <bas@daedalean.ai> Reviewed-on: http://openocd.zylin.com/4301 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-03jtag/drivers/cmsis-dap: fix connect under resetTomas Vanek
Commit ef02b69b14d133b061217a91add5a028a77e86bc included a call to cmsis_dap_cmd_DAP_Connect() before calling cmsis_dap_cmd_DAP_SWJ_Sequence(). According to comment it is necessary for at least Keil ULINK-ME. Commit 72c3464be42088dc75245cf2fcc8f5c6e6959b4b added a cmsis_dap_cmd_DAP_Disconnect() before connect call to pair connection/disconnection. It solves some problems on Atmel EDBG. Unfortunately calling either of cmsis_dap_cmd_DAP_Connect() or cmsis_dap_cmd_DAP_Disconnect() deasserts reset signal. So these workarounds break ability to connect under reset. Use cmsis_dap_cmd_DAP_Disconnect() and cmsis_dap_cmd_DAP_Connect() pair only if both SRST and TRST are deasserted. Change-Id: I0914dae0a1360b8c7fe48231ff3867caedfb2dbe Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reported-by: Leonardo Sabino dos Santos <leonardo.sabino@gmail.com> Reviewed-on: http://openocd.zylin.com/4100 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-12target: remove unused event definitionsTomas Vanek
Events reset-halt-pre, reset-halt-post, reset-wait-pre and reset-wait-post are not used anywhere. Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4285 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-12flash/nor/stm32f2x: fix erase on STM32F413/423Tomas Vanek
Theese devices do not have a gap in sector numbering. The driver translates sectors numbers 12 13... to 16 17... as used on dual bank flash devices. Therefore erase of sector 12 and above fails with error 'stm32x device protected' on F413/423. Drop sector number translation for devices without has_large_mem flag. Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4299 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12flash/nor/stm32f2x: fix protection block size for F767 in dual bank modeTomas Vanek
A protection block comprises two adjacent sectors in dual bank mode. As there are 64 and 128kB sectors joined in blocks 2 and 8, block size should be computed as a sum of sector sizes. Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4271 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-12jtag: drivers: stlink: handle all versions with single configPaul Fertser
Extend HLA interface to allow multiple VID/PID pairs and use it to autodetect the connected stlink version. Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3961 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-07stm8 : new targetAke Rehnman
New STM8 target based mostly on mips4k. Target communication through STLINK/SWIM. No flash driver yet but it is still possible to program flash through load_image command. The usual target debug methods are implemented. Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/3953 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-06flash: Add new stm32h7x driver supportAlexandre Torgue
Add basic support for: -STM32H7x (Embedded flash 2M) Erase and write tested on stm32h743. Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-on: http://openocd.zylin.com/4181 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2026-01-05 06:23:57 +0000