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2009-09-11tap post reset event added. Allows omap3530 to send 100 runtest idle ↵oharboe
tickle's after a TAP_RESET. git-svn-id: svn://svn.berlios.de/openocd/trunk@2696 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11Nicolas Pitre <nico@cam.org> put feroceon target definition at the end so to ↵oharboe
avoid a bunch of useless forward declarations. git-svn-id: svn://svn.berlios.de/openocd/trunk@2694 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11Nicolas Pitre <nico@cam.org> Dragonite supportoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2693 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11spelling mistakeoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2692 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11do not use dynamically sized stack arrays, not compatible with embedded OS'soharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2691 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11registering a target event twice caused infinite loop. Same bug as in ↵oharboe
jtag/core.c copy & pasted. git-svn-id: svn://svn.berlios.de/openocd/trunk@2690 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11Alexei Babich <a.babich@rez.ru> cleanupoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2688 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11Nicolas Pitre <nico@cam.org> tighten error checking in bulk_writeoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2687 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-10Alexei Babich <a.babich@rez.ru> imx31 nand flash controller supportoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2685 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-10Alexei Babich <a.babich@rez.ru> fix problems with unecessary tailend byte ↵oharboe
accesses. Use 16 bit access on tailend of a memory read if possible. git-svn-id: svn://svn.berlios.de/openocd/trunk@2684 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-09Rolf Meeser <rolfm_9dq@yahoo.de> oharboe
This patch adds target algorithm support for those flash devices that do not support DQ5 polling. So far they could only be programmed with host algorithm, but this was way too slow. git-svn-id: svn://svn.berlios.de/openocd/trunk@2682 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-09- Fix bug-in-waiting when adding more than one TAP event typeoharboe
- Infinite loop bugfix when running tap configure a second time git-svn-id: svn://svn.berlios.de/openocd/trunk@2681 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-09David Brownell <david-b@pacbell.net> oharboe
Optionally shave time off the armv4_5 run_algorithm() code: let them terminate using software breakpoints, avoiding roundtrips to manage hardware ones. Enable this by using BKPT to terminate execution instead of "branch to here" loops. Then pass zero as the exit address, except when running on an ARMv4 core. ARM7TDMI, ARM9TDMI, and derived cores now set a flag saying they're ARMv4. Use that mechanism in arm_nandwrite(), for about 3% speedup on a DaVinci ARM926 core; not huge, but it helps. Some other algorithms could use this too (mostly flavors of flash operation). git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08Report correct core instruction state for ARMv/A targetsmlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2678 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.mlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2677 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08David Brownell <david-b@pacbell.net> oharboe
Provide an "armv7a disassemble" command. Current omissions include VFP (except as coprocessor instructions), Neon, and various Thumb2 opcodes that are not available in ARMv7-M processors. git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08David Brownell <david-b@pacbell.net> oharboe
lean up some loose ends with the ARM disassembler - Add a header comment describing its current state and uses and referencing the now-generally-available V7 arch spec - Support some mode switch instructions: * Thumb to Jazelle (BXJ) * Thumb to ThumbEE (ENTERX) * ThumbEE to Thumb (LEAVEX) - Improve that recent warning fix (and associated whitespace goof) - Declare the rest of the internal code and data "static". A compiler may use this, and it helps clarify the scope of these routines (e.g. what changes to them could affect). git-svn-id: svn://svn.berlios.de/openocd/trunk@2675 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-07Improved handling of instruction set state, helps for debugging Thumb state.mlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2674 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04Mahr, Stefan <Stefan.Mahr@sphairon.com> removes the endianness swapping in ↵oharboe
mips_m4k.c Swapping is already done in target.c git-svn-id: svn://svn.berlios.de/openocd/trunk@2673 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode.oharboe
By enabling this bit, the processor halts when a debug event such as breakpoint occurs. git-svn-id: svn://svn.berlios.de/openocd/trunk@2668 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04more debug output for breakpointsoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2667 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04Matt Hsu <matt@0xlab.org> Tidy up the bit-offset operation for DSCR registeroharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2666 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-03David Brownelloharboe
Abstract the orion_nand_fast_block_write() routine into a separate routine -- arm_nandwrite() -- so that other ARM cores can reuse it. Have davinci_nand do so. This faster than byte-at-a-time ops by a factor of three (!), even given the slowish interactions to support hardware ECC (1-bit flavor in that test) each 512 bytes; those could be read more efficiently by on-chip code. NOTE that until there's a generic "ARM algorithm" structure, this can't work on newer ARMv6 (like ARM1136) or ARMv7A (like Cortex-A8) cores, though the downloaded code itself would work just fine there. git-svn-id: svn://svn.berlios.de/openocd/trunk@2663 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-01- fixes the incorrect info msg displayed during stellaris flash programming.ntfreak
git-svn-id: svn://svn.berlios.de/openocd/trunk@2660 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-01- fix a regression when using cortex_m3 emulated dcc channelntfreak
git-svn-id: svn://svn.berlios.de/openocd/trunk@2659 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-31Warning fixduane
git-svn-id: svn://svn.berlios.de/openocd/trunk@2658 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-30David Brownell <david-b@pacbell.net> Minor code bugfix: check right variable.oharboe
Via code review by Steve Grubb <sgrubb@redhat.com>  Almost innocuous; this is value is checked later, this check being wrong would make it check stack garbage. git-svn-id: svn://svn.berlios.de/openocd/trunk@2655 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-30Dirk Behme <dirk.behme@googlemail.com> Fix typo in help text. It has to be ↵oharboe
'production_test' instead of 'production' here. git-svn-id: svn://svn.berlios.de/openocd/trunk@2654 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-30David Brownell <david-b@pacbell.net> Fix Sandstorm revision checking: right ↵oharboe
bits, right value! git-svn-id: svn://svn.berlios.de/openocd/trunk@2653 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-30David Brownell <david-b@pacbell.net> Remove duplicate check for flash write ↵oharboe
status. Via code review by Steve Grubb <sgrubb@redhat.com>  Also minor fixes for the message from "fill": the byte count is unsigned, not signed; and more importantly, print the real number of bytes written git-svn-id: svn://svn.berlios.de/openocd/trunk@2652 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-30David Brownell <david-b@pacbell.net> start phasing out integers as target IDsoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2650 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-30David Brownell <david-b@pacbell.net> Be sure the built-in search paths ↵oharboe
always go *after* ones provided on the command line ... matching comment in add_default_dirs(). Without this it's impossible to use a private config file which happens to have the same name as an installed one. Say, because you're bugfixing a private copy... git-svn-id: svn://svn.berlios.de/openocd/trunk@2649 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-28David Brownell <david-b@pacbell.net> fix warningsoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2648 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-28added arm11 timeout error messagesoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2647 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-28restore ICE watchpoint registers when the *last* software breakpoint is removedoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2646 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-28David Brownell <david-b@pacbell.net> ARM disassembly support for about five ↵oharboe
dozen non-Thumb instructions that were added after ARMv5TE was defined: - ARMv5J "BXJ" (for Java/Jazelle) - ARMv6 "media" instructions (for OMAP2420, i.MX31, etc) Compile-tested. This might not set up the simulator right for the ARMv6 single step support; only BXJ branches though, and docs to support Jazelle branching are non-public (still, sigh). ARMv6 instructions known to be mis-handled by this disassembler include: UMAAL, LDREX, STREX, CPS, SETEND, RFE, SRS, MCRR2, MRRC2 git-svn-id: svn://svn.berlios.de/openocd/trunk@2644 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-27arm11 hardware step using simulation + breakpoint. Use "hardware_step ↵oharboe
enable" command to revert to hardware stepping. Ideally we could retire the "hardware_step enable" command once we no longer believe it to be necessary. git-svn-id: svn://svn.berlios.de/openocd/trunk@2643 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-27arm11 single stepping wip - at least we know the next PC nowoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2642 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-27arm11 single stepping wipoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2641 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-27refactor arm simulator to allow arm11 code to use it as well - no observable ↵oharboe
changes otherwise. git-svn-id: svn://svn.berlios.de/openocd/trunk@2640 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ↵oharboe
cortex-a8: Wait for the CPU to be halted/started With DCCR we are asking the CPU to halt, we should wait until the CPU has halted before proceeding with the operation. git-svn-id: svn://svn.berlios.de/openocd/trunk@2638 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ↵oharboe
Print the value that the method didn't like git-svn-id: svn://svn.berlios.de/openocd/trunk@2637 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ↵oharboe
Only dap_ap_select when we are going to do a memory access in the fast reg case. git-svn-id: svn://svn.berlios.de/openocd/trunk@2636 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> cortex-a8: Copy some more registers from the ↵oharboe
documentation git-svn-id: svn://svn.berlios.de/openocd/trunk@2635 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM ↵oharboe
instruction into the ITR register but it will only be executed when the DSCR[13] bit is set. The documentation is a bit weird as it classifies the DSCR as read-only but the pseudo code is writing to it as well. This is working on a beagleboard. git-svn-id: svn://svn.berlios.de/openocd/trunk@2634 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> Wait for the DTRRX to be full before reading it. ↵oharboe
Remove the trans_mode change as it is done in the mem_ap_read_atomic_u32 function. git-svn-id: svn://svn.berlios.de/openocd/trunk@2633 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ↵oharboe
Before executing a new instruction wait for the previous instruction to be finished. This comes from the pseudo code of the cortex a8 trm. git-svn-id: svn://svn.berlios.de/openocd/trunk@2632 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26David Brownell <david-b@pacbell.net> Fix segv in jtag_examine_chain(): exit ↵oharboe
loop on no-tap. Keep "next iteration" step with the rest of the loop overhead. Cleanup: remove spurious whitespace, and an overlong line; only assign "tap->hasidcode" once. git-svn-id: svn://svn.berlios.de/openocd/trunk@2631 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26added missing check on jtag_executeoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2630 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Remove bogus "BUG:". If the PC is pointing to an invalid instruction, then ↵oharboe
simulation will fail. This is expected. git-svn-id: svn://svn.berlios.de/openocd/trunk@2629 b42882b7-edfa-0310-969c-e2dbd0fdcd60
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-18 08:40:29 +0000