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2012-12-31flash: allow stm32f1x options_write args in any orderSpencer Oliver
Currently we have to supply the arg's to this cmd in a set order, this change fixes that issue. Change-Id: I14a15732e1917a91009e1ac14fba39ca1523c739 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/992 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31flash: use correct stm32f1x option read maskSpencer Oliver
Make sure we do not mask out the BFB2 boot bank bit, as this is used on the larger XL devices. Change-Id: Iacfdf874140e409e0c4ca9b9aee8f5c2f90dc9be Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/991 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31stm32f1x: fix stm32f0/f3 broken unlockSpencer Oliver
The STM32F0 and F3 devices use a different default RDP to configure a unlocked device, make sure we use that. Change-Id: I170779461412c4c202c2cfc8d90baedb7e388150 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/984 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31stm32f1x: preserve user option byte dataSpencer Oliver
The user is able to use 2bytes of the options byte data for whatever purpose they wish. Make sure we preserve this during an option erase/write. Change-Id: Ibf951b11c59a148e671b1eb47fdc9b4f49ccae15 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/983 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-31flash: stm32f1x: write option bytes using the loaderSzymon Modzelewski
Some debuggers (stlink) can't issue 16 bit writes and have to use a loader to write flash memory. Currently the loader is not used for option bytes, causing stm32x_write_options to fail silently on such hardware. Fix this by using stm32x_write_block to write option bytes as well. Change-Id: I49c29d53ab5e162463cb349d4c89bef96467e587 Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com> Reviewed-on: http://openocd.zylin.com/480 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30flash: stm32lx fallback to slow memory writes when no working areaSpencer Oliver
The current stm32lx driver will fail if no working area is provided - fallback to using slow writes if this is the case. Change-Id: I92b1535fec4aebc855c63ce2c54b10f168f3c07e Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1007 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30flash: add new stm32l HD variantSpencer Oliver
Updated as per latest RM0038 Rev 6. Change-Id: Ia11309a1cdc3b8986f808b33a5c565bdc0ba58b0 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1003 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-30flash: format stm32f2x driver definesSpencer Oliver
Change-Id: Ie903996368a8d4313df87839d5ba3f2a102796a3 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/987 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-24stlink: print target voltage if supportedSpencer Oliver
The stlink/v2 has the ability to check the target voltage if the firmware is recent enough (>= J13). As a debugging aid we check the voltage at startup and issue an error if this is too low to debug reliably. Change-Id: I98e251f3880e31049c4307051c30bedd3451cf87 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/980 Tested-by: jenkins
2012-12-24stlink: add generic open error routineSpencer Oliver
Change-Id: I1cd18896ab2a37255471a2d160befed8dd8fb544 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/979 Tested-by: jenkins
2012-12-24helper: improve windows gdb pipe performanceSpencer Oliver
Reducing the select and MsgWaitForMultipleObjects timeouts to 1ms makes a 2-300+% increase in the step time of gdb when using pipes under windows OS. Change-Id: Id7e52cfb2b206347a9caea61672885a3e2b186de Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1050 Tested-by: jenkins
2012-12-24gdb: fix correct shutdown when using pipesSpencer Oliver
50d5441e2a615fb2c44b41a777e4373901f7a2e6 commit added a regression when using pipes with GDB, OpenOCD would appear to hang when exiting GDB. This fixes that behaviour so we shutdown correctly. Change-Id: I9b337c2bdd41b1966de1c7631118257afcbfa6bd Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/993 Tested-by: jenkins
2012-12-24flash: add stm32f2x rev XSpencer Oliver
Updated as per ST RM0033 rev 5 Change-Id: I627fdab69b440b75b8e4f7c474216538fa5273a4 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1001 Tested-by: jenkins
2012-12-23icdi: add TI icdi interfaceSpencer Oliver
This is the new proprietary interface replacing the older FTDI based adapters. It is currently fitted to the ek-lm4f232 and Stellaris LaunchPad. Change-Id: I794ad79e31ff61ec8e9f49530aca9308025c0b60 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/922 Tested-by: jenkins
2012-12-23hla: add ability to configure read/write buffer sizeSpencer Oliver
Other adapters (TI ICDI) that use this driver can use a larger read/write buffer size than the original stlink could. Change-Id: I9beb7748049097cbe29a2340799c450bd74e199d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/948 Tested-by: jenkins
2012-12-23hla: fix watchpoints not being setSpencer Oliver
Watchpoints were not being enabled when the hl adapter target was resumed. This effects both stlink and icdi interfaces. Change-Id: Ia9f8a9415be97a467cd099b63b6bc9f7f37d0c0d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/931 Tested-by: jenkins
2012-12-23rtos: rename stm32_stlink target to hla_targetSpencer Oliver
Update rtos detection to use the new target name. Change-Id: I4e55311bcfbc8af55708b43daf0c73b1c8145934 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/923 Tested-by: jenkins
2012-12-23stlink: rename stlink cmd namesSpencer Oliver
As part of the switch to using the hla for the stlink interface we rename the cmds to a more generic name. Update scripts to match new names. Also add handlers for deprecated names. Change-Id: I6f00743da746e3aa13ce06acfdc93c8049545e07 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/921 Tested-by: jenkins
2012-12-23target: add deprecated target name supportSpencer Oliver
This enables us to change the target name without breaking any target scripts. Change-Id: I635f961e573264d3dab2560f3a803ef1986ccfde Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/919 Tested-by: jenkins
2012-12-23stlink: print version infoSpencer Oliver
Print stlink info always rather than just when debug log enabled. Change-Id: I2a29ef046925200e1c94624280c0b252fab5219a Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/925 Tested-by: jenkins
2012-12-23stlink: use common layoutSpencer Oliver
Even though the stlinkv1 and stlinkv2 use different usb classes they share the same layout scheme. Merge the two into a common layout, thus enabling us to support other adapter layouts. Change-Id: I7d02c44a7f94ebc7f2cb5428b02ee40294fb430d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/918 Tested-by: jenkins
2012-12-14flash: fm3 mb9bfxx7 mb9bfxx8 supportMuranaka Masaki
Patch submitted by Trac #55 Change-Id: I08b0d79d24fe9108ca0bbfbc9b45c60359b6d180 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/981 Tested-by: jenkins
2012-12-14rtos: Add Cortex-R4 support for ThreadXEvan Hunter
Change-Id: I0b55af690ed917ca783d90d11dcf012f49792ed7 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/994 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-11mips_m4k: Fixed mips_m4k_resume code for smp targetsKamal Dasu
Fix for bug introduced in in mips smp support code in the resume logic that is checking for wrong return value. Change-Id: Ice3e0069f936b556fecc338ccc12ddba38deeaf6 Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-on: http://openocd.zylin.com/1048 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-10jtag: fix reset_config copy/paste errorSpencer Oliver
As the other arg checks do not OR, it is assumed this is a copy/paste error from the original code author. Change-Id: I7dfc7396254a6f558887def951c57dfd4a0e6c2c Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/997 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-10stlink: enable connect under resetSpencer Oliver
Currently if the target supports srst_nogate we wait until target assert_reset until we get a chance to assert the srst. However sometimes we will not get this far if the target has already failed the initial scan. This has been tested on stm32. Change-Id: I2c4486942a011534d3e2044788563669bf457b60 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/972 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-10jtag: enable connect under resetSpencer Oliver
Currently if the target supports srst_nogate we wait until target assert_reset until we get a chance to assert the srst. However sometimes we will not get this far if the target has already failed the jtag_examine_chain. This has been tested on targets that support this behaviour (STM32 and STR9). Change-Id: Ibcf7584b137b472f31ba6ddd5cd99d848c5508d1 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/971 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-10jtag: add connect_type reset_config mode flagSpencer Oliver
This adds the ability to request to the adapter how we want to connect to the target, eg. while srst is asserted or not. This ability can very handy for connecting to unresponsive targets. A prerequisite is that the target supports srst_nogate. Change-Id: I0f7c9475160048e8a963e16077754f5403ac8325 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/976 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-12-09cortex_a: Fix target entry state route.Evan Hunter
If target is disabled at init, then is examined using 'arp_examine', it can get to cortex_a8_poll with the target state being unknown. Change-Id: Ifffb345bf971d275d2eb1912648b29f0a75f6ccc Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/954 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-09mips_m4k: Added SMP debug support for mips architecturesKamal Dasu
This change adds smp debug support for mips platforms. The change leverages the exiting gdb smp support as mentioned in the OpenOCD documentation for using gdb in smp environemnt. Added commands smp_on, smp_off, smp_gdb to control the smp mode. The implementation also provides a way to send Jc packet and toggle the gdb display core context as well. Change-Id: I0835a5aed1844b6ebf8291582912f20695346003 Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-on: http://openocd.zylin.com/937 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-09mips_ejtag: Adding EJTAG 4.x and 5.x as valid versionsKamal Dasu
This is a minor change to log EJTAG version 4.x and 5.x as valid versions when debug log is enabled. Change-Id: Ie20458d033c6d22842cb4a31b56765d4ba2ff123 Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-on: http://openocd.zylin.com/936 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-03helper: fix code formattingSpencer Oliver
Change-Id: Ide2d704c9ef4f5563649d5db53bbdd3641868b70 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/995 Tested-by: jenkins
2012-11-30Make NetBSD a recognized systemAymeric Vincent
Change-Id: I7fcb540553da7833a8b6a82335a7296539a8f491 Signed-off-by: Aymeric Vincent <vincent.aymeric@gmail.com> Reviewed-on: http://openocd.zylin.com/998 Reviewed-by: Peter Stuge <peter@stuge.se> Tested-by: jenkins
2012-11-30arm: Mis-aligned data issue fix.Jason Moehlman
Fixes issue with big endian hosts and mis-aligned data on some hosts. Fixes unaligned access exception on hosts that do not support unaligned access when debugging some arm targets. Signed-off-by: Jason Moehlman <jmoehlma@linux-software.com> Change-Id: I6bc6fb1b3c3565b256674b9ef43ed2afd14f5178 Reviewed-on: http://openocd.zylin.com/996 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-11-23stlink: format src definesSpencer Oliver
Change-Id: I7c3fd6e84681e007f1983ad9b8c85369cf9f3ba1 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/978 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-11-19flash: add stm32f42x/stm32f43x supportSpencer Oliver
Other than a larger memory layout these new devices also have an extra MER1 bit to perform the mass erase. Change-Id: I7110a05bac95c1707160d1f5622181664291eb4a Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/985 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2012-11-16mips: patch mips32_pracc_exec_write()Salvador Arroyo
No function writes to MIPS32_PRACC_PARAM_IN addresses and probably has no much sense. Any attempt to write to those addresses should be an error. Change-Id: Iebea5fa9954e2cd56ad34976dd7d25009c6e6388 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/975 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16mips: optimize mips32_pracc_read_regs() codeSalvador Arroyo
Current code needs 101 pracc accesses for this function, this code needs 12 less. There is a singularity in this code, is the only function that restore a register from param out instead from pracc stack. Obviously the register was previously stored at param out. This save 2 pracc accesses. Change-Id: Ie95b6f983a3198dafc0eab2dd5acc11f871a8d83 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/958 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16mips: optimize mips32_pracc_write_regs() code.Salvador Arroyo
All the the loads are done with lui and ori instructions, there is no need to save any register, they will be overwritten. Like in the previous patch, for speed optimization in write code, same instructions can be saved if the lower half word or the upper half word is 0. If the lower half word is 0, it can be loaded with only a lui instruction. If the higher half word is 0 it can be done with an ori instruction with register 0. This code saves 10 pracc accesses at a minimum, and 40 at a maximum, obviously if register 2 to 31 are 0 or a half word is 0 Current code needs 91 pracc accesses. Change-Id: I892c5b440191d0c7a474c96845d41c373b7fc637 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/957 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: jenkins
2012-11-16mips: optimize write code for speedSalvador Arroyo
All the writes are done by the new function mips32_pracc_write_mem_generic(). The code is similar to the read generic code. The reuse of register 15 as memory base address saves 3 pracc accesses. The first write takes 13(12) pracc accesses and for additional writes 3(2). Loading miniprograms should take 25% less time and loading fastdata transfer handler code should be over 2x faster. Change-Id: Ia3b24ba084af33be99da19f00a7fd4d1b291f350 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/956 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16mips: optimize read code for speedSalvador Arroyo
Really nothing new that not explained in previous patches. The code is expanded as needed, there are no loops in pracc code. For the first value pracc accesses are reduced from 39 to 16 and for aditional values from 10 to 3. dump_image should work around 3x faster. Change-Id: I37c9b13395c09eb52a91f10cdb6cbaedef8ab98b Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/955 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16mips: optimize mips32_pracc_read_u32() functionSalvador Arroyo
This function is highly optimized, there is not much to improve. Loading the base address for pracc access with the new defined MIPS32_PRACC_BASE_ADDR saves one instruction. The memory address is loaded in too steps. First the upper address is loaded. The lower address is passed as an offset in the memory load instruction. The offset is signed, if the lower address is in the range of 0x8000 to 0xffff the offset is a negative value, and the upper address must be incremented by 1. Pracc accesses are now 12 instead of 14. Change-Id: I286945b240ed5c5d5cc540780a41a8a5fa075da3 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/952 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16mips: optimize CP0 read/write codeSalvador Arroyo
MIPS32_PRACC_BASE_ADDR is defined as 0xFF200000. Now is possible to load the base address with a lui instruction and only one pracc access. Offsets to the pracc code addresses are defined to simplify the code and probably make it a bit more readable or self-explained. Change-Id: I853dd2d7fad52745931cc6e6be68c0ae156d897e Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/951 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: jenkins
2012-11-16mips: code clean up in mips_m4k_debug_entry() functionSalvador Arroyo
The function mips_ejtag_read_debug() is defined in mips_ejtag.c and is called only by mips_m4k_debug_entry() for reading the CP0 debug register. The comment in this function is obviously wrong. There is a generic function to read CP0 registers with similar code. A call to mips32_cp0_read() should work in the same way. The purpose of reading the debug register is to test if the DSS bit is set and clear the SSt bit. It is faster and easier if the SSt bit is cleared without any check. Remark: DSS bit set only means that a debug single-step exception ocurred, but it is not possible to step over a sdbbp instruction, in this case DSS will not be set and the SSt bit not cleared by code. Resume command at another address will step, so really the behavior is not the same. Change-Id: Ibd35f80e0f7669976d96f4ed813830cecf587971 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/950 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-16mips: optimize mips_ejtag_step_disable() codeSalvador Arroyo
The code is a bit large compared to mips_ejtag_step_enable(). With the mips32 xori instruction the code can be reused. The number of pracc accesses are reduced from 18 to 7. Change-Id: If3974ebd64da4461c22b089796646990e68e1b72 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/944 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-12Revert "mpsse: Always perform a general reset of the MPSSE in mpsse_open()"Freddie Chopin
This reverts commit 452248af1d06cb1140b85f53ef4fdee1c746d807. This change breaks all non-high speed adapters. The patch was not tested and did not get any review. Change-Id: Ib38fd242a202fd7c5a8711d9f857cd8f586df44e Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/973 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-12rtos: Fix error in reading the current thread in ChibiOS/RTMatthias Blaicher
Commit c4ab127b4069e20e introduces a copy&paste error which affects the detection of the current thread. As a result, the stack of the current thread won't be detected correctly in most cases. Change-Id: Ib46b8f64be8053d7e9103f427c66796963214419 Signed-off-by: Matthias Blaicher <matthias@blaicher.com> Reviewed-on: http://openocd.zylin.com/974 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-06target: add async algorithm timeoutSpencer Oliver
An issue was observed when using an async algorithm with a target that had not been previously reset beforehand. The target would enter a infinite loop within target_run_flash_async_algorithm. Add a timeout that will at least prevent this issue from happening. and also suggest the user resets the target. Change-Id: I5277e0d64e252d3d353e8d5bc9889a37fdc63060 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/949 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-11-06ARM v4/v5 target files: mrc and mcr help information is incorrect.Karl Kurbjun
The order of the mrc/mcr command matches the ARM Architecture Reference Manual. This patch corrects the help information for mrc/mcr. Change-Id: I1f0e6a628a3644124591a6aa291b8a58cfd93b44 Signed-off-by: Karl Kurbjun <kkurbjun@gmail.com> Reviewed-on: http://openocd.zylin.com/914 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-11-06cortex: autostep correctly handle user breakpointSpencer Oliver
If we halt due to a breakpoint make sure that we do not remove it during a step, only remove breakpoints we have created. Change-Id: I060168e54e53637d4fbf3cbcf62072efdb353807 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/947 Tested-by: jenkins
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