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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "replacements.h"
the following form should be used.
#include <helper/replacements.h>
The exception is from .c files in the same directory.
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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "membuf.h"
the following form should be used.
#include <helper/membuf.h>
The exception is from .c files in the same directory.
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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "log.h"
the following form should be used.
#include <helper/log.h>
The exception is from .c files in the same directory.
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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "jim.h"
the following form should be used.
#include <helper/jim.h>
The exception is from .c files in the same directory.
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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "ioutil.h"
the following form should be used.
#include <helper/ioutil.h>
The exception is from .c files in the same directory.
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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "fileio.h"
the following form should be used.
#include <helper/fileio.h>
The exception is from .c files in the same directory.
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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "configuration.h"
the following form should be used.
#include <helper/configuration.h>
The exception is from .c files in the same directory.
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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "command.h"
the following form should be used.
#include <helper/command.h>
The exception is from .c files in the same directory.
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Changes from the flat namespace to heirarchical one. Instead of writing:
#include "binarybuffer.h"
the following form should be used.
#include <helper/binarybuffer.h>
The exception is from .c files in the same directory.
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These headers need minor tweaks to paves the way for wholesale
scripted coversion of the header files.
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Includes the src directory in the search path, so header files may be
migrated from:
#include "foo.h"
to
#include <module/foo.h>
which is more conducive for installation.
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The Feroceon and Dragonite cores are similar to the ARM926 and ARM966
cores respectively.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Adds two "minidriver_imp.h" files, so the right one is allowed to be
"#included" by the Makefile logic.
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Moves JTAG interface drivers to src/jtag/drivers/,
Adds src/jtag/drivers/Makefile.am.
Builds libocdjtagdrivers.la.
Flattens the rlink driver files into the drivers/ directory, adding
the 'rlink_' prefix or '.rlink' suffix as appropriate.
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Moves NOR flash drivers to 'src/flash/nor/'.
Adds 'src/flash/nor/Makefile.am'.
Builds 'libocdflashnor.la'.
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Moves NAND drivers to src/flash/nand/.
Adds src/flash/nand/Makefile.am.
Builds libocdflashnand.la.
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Remove the remaining extra copy of DSCR, and the register cache
of which it was a part. That cache wasn't a very safe, or even
necessary, idea; it was essentialy letting debugger-private state
be manipulated by Tcl code that couldn't know how to do it right.
This makes the "reg" output of an ARM11 resemble what most other
ARM cores produce ... forward motion in the "make ARM11 work like
the rest of the ARM cores" Jihad!
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Just store a clean copy of DSCR in the per-CPU struct, so we
trivially pass a pointer to a recent copy. This replaces the
previous "last_dscr" and cleans up most of the related calling
conventions ... but it doesn't remove the other DSCR copy.
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Don't expose the WDTR register through the register cache any
more. If anyone wants Tcl scripts to be able to use DCC based
communication with app code in the target, this wouldn't do it.
Bugfix: don't trust the Tcl-accessible version of DSCR to
flag whether WDTR needs to be restored when resuming.
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Don't expose the RDTR register through the register cache any
more. If anyone wants Tcl scripts to be able to use DCC based
communication with app code in the target, this wouldn't do it.
Bugfix: don't trust the Tcl-accessible version of DSCR to
flag whether RDTR needs to be restored when resuming.
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Streamline arm11_on_enter_debug_state() entry:
- It should handle the standard updates:
* target->debug_reason
* target->state
- Don't waste time re-reading DSCR; just pass it in
Also rename the routine to "arm11_debug_entry()", matching the
convention used elsewhere in OpenOCD.
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Don't need/want arm11->target; we have arm11->arm.target instead.
Also remove some unused watchpoint stuff.
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Move the initial breakpoint/watchpoint disable calls to
arm_dpm_initialize(), and start using that routine. This
split helps with arm11 support.
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Add headers missing from Makefile rules to pass 'make distcheck'.
These were included in the tree but were not added with those commits.
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The command handler registration was put at the top level, rather
than as a subcommand. Move it to where it belongs.
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The new stubs for httpd and ioutil gave errors like:
ioutil_stubs.c: In function ‘ioutil_init’:
ioutil_stubs.c:27: error: implicit declaration of function ‘LOG_DEBUG’
ioutil_stubs.c:28: error: ‘ERROR_OK’ undeclared (first use in this function)
ioutil_stubs.c:28: error: (Each undeclared identifier is reported only once
ioutil_stubs.c:28: error: for each function it appears in.)
Fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Add httpd_stubs.c to provide no-op implementations of httpd_start()
and httpd_stop().
Allows these routines to be called unconditionally and ensures the
libocdserver ABI remains unchanged regardless of whether this feature
was built-in or not.
Prints a DEBUG message when the stub implementation is included.
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Add ioutil_stubs.c to provide an empty ioutil_init() routine.
Add ioutil.h to prevent applications from needing to declare it.
Allows unconditionally calling that function during startup, and the
resulting libocdhelper library API is now more stable.
Prints a DEBUG message when the stub implementation is included.
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Adds server_stubs.c to hold these routines, using automake logic to
ensure it gets included under the right conditions.
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Adds 'target init' command handler, called as part of 'init'.
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Moves body of target initialization loop into a helper function,
cleaning up its visual flow in the process.
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Adds 'jtag init' command handler, which can be called as part of a
fine-grained 'init' process.
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Split flash initialiation into 'flash init', called from 'init'.
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Splits mflash initialiation to 'mflash init', called from 'init'.
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Split NAND initialization into 'nand init', which gets called from
the main 'init' command.
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Split PLD initialization into 'pld init', which gets called from 'init'.
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Save and display the address of the instruction which triggered the
watchpoint. Because of pipelining, that's well behind the PC value
when debug entry completes. (Example in a subroutine that had been
returned from...)
Remove unused A8 stuff, mostly watchpoint hooks from the header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Except for USR/SYS mode, the labels for the shadowed SP and LR
registers were reversed. LR is r14; SP is r13. Fix.
This would not affect GDB users; GDB references are positional.
Only folk working directly with OpenOCD register values would
have noticed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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keep up with server_init() introduction.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Actually this should handle both breakpoints and watchpoints ... but
the DPM framework only handles watchpoints for now. Works on Beagle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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This is a NOP unless the underlying core exposes two new methods, and
neither of the two cores using this (ARM11xx, Cortex-A8) do so yet.
This patch only updates those cores so they pass a flag saying whether
or not to update breakpoint and watchpoint status before resuming; and
removing some now-needless anti-segfault code from ARM11. Cortex-A8
didn't have that code ... yes, it segfaulted when setting watchpoints.
NOTE: this uses a slightly different strategy for setting/clearing
breakpoints than the ARM7/ARM9/etc code uses. It leaves them alone
unless it's *got* to change something, to speed halt/resume cycles
(including single stepping).
ALSO NOTE: this under-delivers for Cortex-A8, where regions with size
up to 2 GBytes can be watched ... it handles watchpoints which ARM11 can
also handle (size 1/2/4 bytes). Should get fixed later.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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These are architecturally defined, not core-specific.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Keep up with Jim Tcl interpreter creation cleanup.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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In embedded hosts, the Jim interpreter can come from the
existing context rather than be created by OpenOCD.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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We don't need this code, now that the DPM code handles it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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We don't need this code, now that the DPM code handles it.
Neither do we need the ARMv7-A CP15 operations; remove their
remnants too. And disable a mostly-needless diagnostic.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Instead of having separate ARM11 and Cortex-A8 implementations of
this code, have one shared implementation which just builds on the
existing "run instruction via R0" support.
This enables followup patches to remove that now-unused code from
those two drivers. (Patches to move the "mrc" and "mcr" code into
"struct arm" are due too ... MIPS and other cores do not support
those ARM-specific concepts.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Switch "mrc" and "mcr" commands to be toplevel ARM operations,
as they should initially have been.
Correct the usage message for both commands: it matches ARM
documentation (as one wants!) instead of reordering them to
match the funky mrc() and mcr() method usage (sigh).
For Cortex-A8: restore a line that got accidentally dropped,
so the secure monitor mode shadow registers will show again.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The ARMv7-A code uses read_cp15() to access fault registers.
Instead, use DPM operations directly, passing in the relevant
MRC instructions.
This eliminates per-operation overhead (though it'll be hard
to observe, this is uncommon) and helps eliminate read_cp15().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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There were two chunks of Cortex-A8 code which called the
ARMv7-A CP15 operations; get rid of them, helping prepare
to remove those methods completely:
- post_debug_entry() can use the mrc() method to read
its two registers.
- write_memory() can use dpm->instr_write_data_r0() to
flush the ICache and DCache ... doing it this way is
actually faster since it reduces per-write overhead.
Note that the mrc() method parameters are re-ordered with
respect to the ARM instruction documentation, so that part
can be confusing.
Cleaned up the layout and comments in those areas a bit.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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