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2013-09-13target: Rewrite read/write buffer default implementationsAndreas Fritiofson
Rewrite the target_*_buffer_default to generate as large accesses as possible while maintaining natural alignment. These versions are easy to extend to generate 8-byte accesses to support 64-bit targets, although it requires some conformity from all target implementations (i.e. they need to refuse unsupported access sizes with some defined error code, so we can try again with a smaller one). Change-Id: I00ddcbb1d2fd33f9f8b99cb448cc93505a2421fc Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1221 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-13[RFC] target: Move bulk_write_memory to arm7_9Andreas Fritiofson
The only remaining user is arm7_9 so remove it from the target API and add it to struct arm7_9_common to support all its variants with minimal changes. Many of the variants are likely not correct in the cache/mmu handling when the bulk write is triggered. This patch does nothing to change that, except for arm946e, where it was easier to do what might be the right thing. Change-Id: Ie73ac07507ff0936fefdb90760046cc8810ed182 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1220 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-08armv7m: use consistent arm.cpsr memberSpencer Oliver
We already set cpsr in armv7m_build_reg_cache, so lets use it for all other accesses to this field. Change-Id: I19b3b21ecf1571bbea12e1be664845e6544f6fa1 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1539 Tested-by: jenkins
2013-09-08target: remove unimplemented target_request_data implementationsSpencer Oliver
Change-Id: Ia9afa83752d17f0f56bdf3bd81f5c69d108aa5e9 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1537 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-09-08target: check target supports target_request_dataSpencer Oliver
Make sure the target support target requests before we enable any receivers. Change-Id: I8ce42922eaff76fb5e7a114da716f2a6585a6ab5 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1536 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-09-08target: remove unimplemented soft_reset_halt implementationsSpencer Oliver
Let the default handler issue an unsupported warning rather than using empty handler routines that may/may not issue a unsupported warning. Change-Id: Iafe3e45146981a4cfae39771c3ab7370ac86da48 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1535 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
2013-08-29target: Remove error messages as no .get_gdb_fileio_infoHsiangkai Wang
If target does not support semi-hosting function, it has no need to provide .get_gdb_fileio_info callback. OpenOCD will use default function target_get_gdb_fileio_info_default. The default function just return ERROR_FAIL and gdb_server will treat every halted condition as normal halted and return "Txx" to gdb. Change-Id: I9ddb2be3a1145eae2ef5b712bdea89eb2e0fbc20 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1586 Tested-by: jenkins Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07target: clear running_alg flag after resetPaul Fertser
After the target was reset we can be sure it's not running any algorithm. This fixes the following failure scenario: On my STM32F103 board after I start the firmware and then stop and try to "load" in gdb (before doing mon reset halt), I get Error: timeout waiting for algorithm, a target reset is recommended However, target reset doesn't help as the flag is still there ("Error: Target is already running an algorithm"), so I have no choice but to restart the OpenOCD process. I'm not sure yet what exactly prevents load from working after my firmware is initialised, most probably some interrupt is firing and my handler produces a fault due to garbled RAM. Change-Id: Idd977f2780a64d84800e3abd412cffc1ab6801b0 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1512 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07stlink: add SWO tracing supportAndrey Yurovsky
Enable reading the SWO trace output via STLinkv2 dongles that support it. This adds an optional initialization parameter "trace" with which the user specifies a destination file where SWO trace output is appended as it comes in as well as the trace module's source clock rate. STLink will be configured for a 2MHz SWO data rate (STLink's highest supported rate) if the source clock is > 2MHz, otherwise the source clock is used as the data rate directly. For example: trace swo.log 168000000 If "trace" is specified with a usable file path, the stlink_usb driver will attempt to configure and read SWO trace data as follows: - on _run(), the target's TPI and TMI are configured and the STLinkv2 is told to enable tracing. Only generic ARM TPI and TMI registers are configured, any MCU-specific settings (ex: pin routing) are the responsibility of the target firmware. The configuration applied is based on the STLinkv2's capabilities (UART emulation). - on _v2_get_status(), the trace data (if any) is fetched from the STLink after the target status is checked and the target is found to be running. - on _halt(), the STLink is told to disable tracing. When fetching trace data, the entire trace frame is written to the output file and that data is flushed. An external tool may be used to parse the trace data into a more human-readable format. Tested on ARM Cortex M4F and M3 MCUs (STM32F407 and STM32L152). Change-Id: Ic3983d46c82ba77010c23b0e18ce7b275d917f12 Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com> Reviewed-on: http://openocd.zylin.com/1524 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-08-07gdb_server: add target_debug_reason for program exit detectionHsiangkai Wang
Currently, there is no way to notify gdb that program has exited. Add new target_debug_reason called DBG_REASON_EXIT to notify gdb the condition has occured. If the debug reason is DBG_REASON_EXIT, gdb_server will send 'W' packet to tell gdb the process has exited. Change-Id: I7a371da292716a3e6ac4cc2c31b009a651fe047a Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1242 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07gdb_server: support File-I/O Remote Protocol ExtensionHsiangkai Wang
The File I/O remote protocol extension allows the target to use the host's file system and console I/O to perform various system calls. To use the function, targets need to prepare two callback functions: * get_gdb_finish_info: to get file I/O parameters from target * gdb_fileio_end: pass file I/O response to target As target is halted, gdb_server will try to get file-I/O information from target through target_get_gdb_fileio_info(). If the callback function returns ERROR_OK, gdb_server will initiate a file-I/O request to gdb. After gdb finishes system call, gdb will pass response of the system call to target through target_gdb_fileio_end() and continue to run(continue or step). To implement the function, I add a new data structure in struct target, called struct gdb_fileio_info, to record file I/O name and parameters. Details refer to GDB manual "File-I/O Remote Protocol Extension" Change-Id: I7f4d45e7c9e967b6d898dc79ba01d86bc46315d3 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1102 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07gdb server: new feature, add stop reason in stop reply packet for gdbHsiangkai Wang
In GDB remote serial protocol, the stop reply packet could contain more detail stop reason. The currently defined stop reasons are listed below. * watch * rwatch * awatch * library * replaylog This commit adds stop reason, watch/rwatch/awatch, in stop reply packet for just hit watchpoint. As manual indicates, at most one stop reason should be present. The function needs target to implement new hook, hit_watchpoint. The hook will fill the hit watchpoint in second parameter. The information will assist gdb to locate the watchpoint. If no such information, gdb needs to scan all watchpoints by itself. Refer to GDB Manual, D.3 Stop Reply Packets Change-Id: I1f70a1a9cc772e88e641b6171f1a009629a43bd1 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1092 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07gdb_server: support gdb target descriptionHsiangkai Wang
* Add a parameter in .get_gdb_reg_list() to return different register lists as generating target description. * Modify STRUCT REG to let gdb generate target description according to register information. The modified structure of register is struct reg { const char *name; uint32_t number; /* for regnum="num" */ struct reg_feature *feature; /* for register group feature name */ bool caller_save; /* for save-restore="yes|no" */ void *value; bool dirty; bool valid; bool exist; uint32_t size; struct reg_data_type *reg_data_type; /* for type="type" */ const char *group; /* for group="general|float|vector" */ void *arch_info; const struct reg_arch_type *type; }; Change-Id: I2096b67adf94518ba0b8b23d8c6a9f64ad7932b8 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1382 Tested-by: jenkins Reviewed-by: Franck Jullien <franck.jullien@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-07-26cortex_m: change cmd output to use cortex_m rather than cortex_m3Spencer Oliver
Change-Id: I33834910c44d22169bcf684e9697a8db49d0b396 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1513 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-07-17target: fix halt and wait_halt timeout unitsPaul Fertser
Documentation says they should be given values in milliseconds, DEFAULT_HALT_TIMEOUT matches that too. Change-Id: Ic1a30fa90f75b412c43fe50ba187d01c3d0a5fba Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1504 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17etm: prevent segfault when reading bogus informationPaul Fertser
When I do not have the JTAG adapter connected to the target, I often end up always reading 1s from the chain. If the OpenOCD is configured to connect to an ETM-equipped target (i.MX25 ARM9 in my case), this results in writing garbage values in the etm reg_cache as the ETM bit fields for the comparators, counters and outputs are wider than the amount of entries in the corresponding arrays. This later results in a segfault in the first etm_reg_lookup() call. Change-Id: Ied81fdbf3a53a3dd749e2e5e97adf86c012df575 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1505 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17mips: add breakpoint support for EJTAG 2.0Oleksij Rempel
EJTAG 1.5, 2.0 and 2.5 have different breakpoint register addresses. This patch add support of EJTAG 2.0, which is part some broadcom SoCs. This work was testet on Broadcom BCM7401. Change-Id: I4b0ee23871fa9205f9001b7c9165e7b6ebe9ccbf Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/1464 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17mips32: add new functions mips32_configure_ibs and _dbsOleksij Rempel
Split function mips32_configure_break_unit to mips32_configure_ibs and mips32_configure_dbs to make code more readable. This will probably make work easyer with differnet EJTAG versions. Change-Id: I666f949fd7bc3656bdf75e7bcaadb164f15855dd Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/1463 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17mips32_pracc: jump to 0xff20.0200 if cpu reads wrong addrOleksij Rempel
On some CPUs, like bcm7401 with EJTAG v2.0 we can have situation where CPU do not stops execution. For example, all CP0 commands will have this issue. In this case we should some hove recover our session. Currently jump to 0xff20.0200 seems to be good option. If it brake some thing on newer EJTAG, then check for EJTAG v2.0 should be added. Change-Id: Icd8841f38a1a85e0f7682b6dc358af8dfaae0744 Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net> Reviewed-on: http://openocd.zylin.com/1353 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17mips32: add jump instructionOleksij Rempel
This instruction we will need to make jump to 0xff20.0000 Change-Id: Ic723e683e8848492cd8e186e71fd668dbd1d97e6 Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net> Reviewed-on: http://openocd.zylin.com/1338 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17do not wait forever on ejtag_dma_dstrt_pollOleksij Rempel
Change-Id: I26adab09839795ecf363b7db912392bd5314cec5 Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net> Reviewed-on: http://openocd.zylin.com/1344 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17mips32_dmaacc: add new funct ejtag_dma_dstrt_pollOleksij Rempel
Change-Id: I8472a85032e397445408dce917f60c8e6ce852e2 Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net> Reviewed-on: http://openocd.zylin.com/1343 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17mips_ejtag: remove memory protection bit before DMOleksij Rempel
Change-Id: Id1564ae063cea4f056b350436d52df5381ca9608 Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net> Reviewed-on: http://openocd.zylin.com/1341 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-17mips_ejtag: cache ejtag version to avoid recalculationOleksij Rempel
Some parts of code are version specific. It will be easier if we extract ejtag version and store it some where. Change-Id: I8f9addc42108cba5ae9d61b8ade8f9d7f02a0fb5 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/1462 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-15target: use consistent halt timeoutSpencer Oliver
On slow targets we sometimes get false messages about timeouts due to poll using 1sec rather than the default 5sec timeout. Change-Id: Icc81c78e0ca86cebf9eeb2f5307cf7a82f1f4ee8 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1466 Tested-by: jenkins
2013-07-15dsp563xx: Adding breakpoint/watchpoint support.Bernhard Kiesbauer
Added missing breakpoint/watchpoint implementation to dsp563xx target. Implementation is not yet complete, which means it does not leverage all available features of the once debug interface. This does NOT use the openocd breakpoint/watchpoint command because of the "special" memory address spaces (X/Y/P/L) of the 56k DSP series. Change-Id: I6840a3ff1e6fdebb38ab7758f164886aff773af6 Signed-off-by: Bernhard Kiesbauer <bernhard@kiesbauer.com> Reviewed-on: http://openocd.zylin.com/1468 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-15oocd_trace: fix warningsPaul Fertser
gcc (Gentoo Hardened 4.6.3 p1.13) produces a warning about the variable assigned but not used. write() can sometimes write less than the specified count so it's marked with warn_unused_result in the system headers and its return value can't be ignored. The most correct solution would be to have a loop writing the buffer until all bytes are written or an error is returned but here it's impractical. Change-Id: I75f7482e2b26fe0e6d70d34947518d3a8f0afe5c Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1490 Reviewed-by: Laszlo Papp <lpapp@kde.org> Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-15target: remove double const specificatorPaul Fertser
Double const is bogus and breaks the build on Clang 3.3. Change-Id: I9f9394d17f66289ac74ae6dd48f3165483b72e9e Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1489 Reviewed-by: Laszlo Papp <lpapp@kde.org> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: jenkins
2013-07-01target: xscale make reset init work properlyRobert Jarzmik
On XScale architecture, to write debug control register DCSR and activate JTAG debug (ie. to choose Halt Mode), the enabling can only be done while the board is held in reset state (ie. PXAxx #RST line held low). The current implementation writes to the register before asserting the SRST line. Swap the order to activate the SRST line before writing to DCSR. Change-Id: I914b9d53d39bdeb5fe4ee5e11068cafafe0da4d2 Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Reviewed-on: http://openocd.zylin.com/1458 Tested-by: jenkins Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-01target: xscale more human vector catchingRobert Jarzmik
Replace hexadecimal masks for vector catching with words representing the caught exception, such as dabt for data abort, etc ... This way, the new xscale command is : - xscale vector_catch Reads back to the user the current vector catching status - xscale vector_catch reset dabt pabt Sets the caught vectors to data abort and prefetch abort for example. This is mostly taken from Cortex-M3 openocd code. Change-Id: I66591d5796f0e07f0f31edc8d28722e1e48aa8c5 Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Reviewed-on: http://openocd.zylin.com/1456 Tested-by: jenkins Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-01armv4_5: prevent segfault when gdb connects to an underinitialised targetPaul Fertser
This prevents segmentation fault that can occur on cortex_a targets if gdb connection is established before it's halted and CPSR examined. Change-Id: Id996200e0fd95440496509c1fecaabbdbf425e23 Tested-by: Henrik Nordstrom <hno@squid-cache.org> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1446 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-01cortex_m: deprecate soft_reset_haltSpencer Oliver
soft_reset_halt was only really intended for the older arm arch, eg. armv4/5. Newer arch such as armv7m/mips do not need this as they have better alternatives. Change-Id: Ifb360680b7e4bfa5365f3c79d82574bded952b45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1442 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-06-14hla: Add Simulated DCC register for target communicatonBrent Roman
Change-Id: I193be169059caba661e46de8081d7e92f92cafee Signed-off-by: Brent Roman <brent@mbari.org> Reviewed-on: http://openocd.zylin.com/1364 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-12[RFC] mips: Enable bulk write optimization for all writesAndreas Fritiofson
mips_m4k_bulk_write_memory was only called from target_write_buffer as an optimization when the word count was large enough. Remove mips_m4k_bulk_write_memory from the target type, causing the default implementation to call the regular mips_m4k_write_memory instead. Perform the dispatch to bulk write in mips_m4k_write_memory, enabling the optimization for target_write_memory() writes with size 4, in addition to target_write_buffer() writes. It also enables making the choice of bulk write vs regular write specifically for the architecture and not relying on the generic target code to make a sensible decision. Change-Id: I295f21a67ceaa195802403f2518ea2e0a025c1c7 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1215 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: jenkins
2013-06-12cortex_a: remove memory leak on failureSpencer Oliver
If mem_ap_sel_write_atomic_u32 fails then tmp_buff may not be released. Detected by clang. Change-Id: I3d5416bd47d0eea61f61ec02ac5e43c82f114108 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1433 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-06-12Change variable scope.Jim Norris
Change scope of the variable gdb_reg_list_idx from global to module. Change-Id: Ib8273c0769c11c1d5a338e4711efbddb8e8a0243 Signed-off-by: Jim Norris <u17263@att.net> Reviewed-on: http://openocd.zylin.com/1441 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2013-06-05update files to correct FSF addressSpencer Oliver
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-06-05nds32: add new target type nds32_v2, nds32_v3, nds32_v3mHsiangkai Wang
Add target code for Andes targets. Change-Id: Ibf0e1b61b06127ca7d9ed502d98d7e2aeebbbe82 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1259 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05aice: add Andes AICE supportHsiangkai Wang
Andes AICE uses USB to transfer packets between OpenOCD and AICE. It uses high-level USB commands to control targets instead of using JTAG signals. I define an interface as aice_port_api_s. It contains all basic operations needed by target-dependent code. Change-Id: I117bc4f938fab2732e44c509ea68b30172d6fdb9 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1256 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-03cortex_m: print 'Cortex-M' rather than 'Cortex-M3'Spencer Oliver
This file is used by all the Cortex-M family not just Cortex-M3. Change-Id: Ie8680535b220c66bb8fcd862510407a46a73e8a0 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1429 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-06-03cortex_a: fix FTBS on ARM due to alignment issuesAndreas Fritiofson
Native compilation on RaspberryPi with gcc (Debian 4.6.3-1) 4.6.3 Target: arm-linux-gnueabi ends with error: cortex_a.c: In function 'cortex_a8_read_apb_ab_memory': cortex_a.c:2063:40: error: cast increases required alignment of target type [-Werror=cast-align] cc1: all warnings being treated as errors Also check for malloc failure. This patch is compile-tested only. Change-Id: I580c505424d03ac3a565de54182db22277c52ac1 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1369 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-29cortex_m, hla_target: do not try asserting SRST if it's not presentPaul Fertser
This should cover all the cases when RESET_SRST_NO_GATING is set without RESET_HAS_SRST. This might happen when RESET_SRST_NO_GATING is automatically set by a target code (and not from tcl). However, there're some other places (mips_m4k, arm7_9_common) where adding RESET_SRST_PULLS_TRST would lead to trying to use SRST even if it's not present. Currently it's impossible for the user to enable that flag without enabling SRST. Change-Id: Ib1c6f68feed0b8057d55afd5f260bb22ab332ced Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1405 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-28targets: fix target_type name for Cortex-A targetsPaul Fertser
Commit d9ba56c295f057e716519a798bf9cdb4898c24f4 did a bunch of renaming of cortex_a8 to cortex_a, including the names in config files. However that introduced a regression as the name in target_type struct remained unchanged. This adds the last missing bit: actual renaming of the target name as understood by OpenOCD. Also change the (hopefully) last instance of using it in the supplied config files, namely from imx6.cfg. Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1420 Tested-by: jenkins Reviewed-by: Chris Johns <chrisj@rtems.org> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-10Added functionality to the SYS_SYSTEM semihosting call.Brandon Warhurst
There seems to be a few missing semihosting calls. I am not sure why this one is actually missing, since it seems simple enough to implement. It was tested using an HTC HD7 connected to openocd through a "home brew" ftdi 4232H board. Change-Id: Ie17dc96c6d48227a3dc9ff1e21201a85498a10b1 Signed-off-by: Brandon Warhurst <roboknight@gmail.com> Reviewed-on: http://openocd.zylin.com/1345 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-28target: rename cortex_a8 to cortex_aSpencer Oliver
Rename cortex_a8 target to use a more correct cortex_a name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: I0eb1429c9281321efeb444b27a662a941a2ab67f Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1130 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28target: rename cortex_m3 to cortex_mSpencer Oliver
Rename cortex_m3 target to use a more correct cortex_m name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: Ia8429f38e88da677249c5caa560c50f8ce56ea10 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1129 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28cortex_m: remove old target breakpoints/watchpointsSpencer Oliver
Sometimes the target may have breakpoint registers set from a previous debug session, we can either sync them or as we have chosen here clear them. Change-Id: I439a623ebbf010246a70e5596d04aa7d546da731 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1363 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28arm: fix arm reg regressionSpencer Oliver
Seems commit fc2abe63fd3cea7497da7be2955d333bd3f800b9 caused a regression in that the arm reg cmd no longer worked. The issue was caused because we changed the value of ARM_MODE_THREAD which was being checked in arm_init_arch_info. Change-Id: Id571d4ab336d1b0e2b93363147af245d24b65ca5 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1362 Tested-by: jenkins Reviewed-by: Luca Bruno <lucab@debian.org> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20mips: m4k alternate pracc code. Patch 4Salvador Arroyo
Now all the functions with only fetch accesses are modified. The same delay between scans has been added to mips32_pracc_fastdata_xfer(), it should work at the same scan rates as the other pracc functions, but it needs higher scan_delays to work. Change-Id: Ifb31d8ea6de9d22674385782913d221a2494dbbf Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1196 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20mips: m4k alternate pracc code. Patch 3Salvador Arroyo
Functions mips32_pracc_read_mem(), mips32_cp0_read() and mips32_pracc_read_regs() are now modified. mips32_cp0_read() is very similar to mips32_read_u32() with one store access. mips32_pracc_read_regs() is the only function that can not be executed from only one queue. Now this function is modified to use reg8, it saves all the registers but does not restore reg8. To remedy this, mips_ejtag_config_step() is called after mips32_save_context() in mips_m4k_debug_entry(). Function mips_ejtag_config_step() is modified to use reg8 and restore it from ejtag info instead of using DeSave for save/restore. Change-Id: Icc224f6d7e41abdec94199483401cb512cc0b450 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1195 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-20 08:48:58 +0000