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2016-12-08target: LS1_SAP: fix "declaration of 'read' shadows a global" warningPaul Fertser
Change-Id: I7070193819cc134f9fe1427c20a11160ec415ccb Reported-by: Jens Bauer <jens-lists@gpio.dk> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3877 Tested-by: jenkins
2016-12-08target: Replace malloc+manual zeroing with callocAndreas Fritiofson
Change-Id: I3c782c34b59cb36b8ca1d36e9c804c67bae5cb45 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3667 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08xscale: Move debug handler to contrib/loadersAndreas Fritiofson
Avoid special rules to generate array at compile time by shipping the generated file. Convert to Makefile build like the other loaders. Change-Id: I5a05edddcfaff3d395086cd3aa33120f8a7aa9dc Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3864 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08cortex_a: fix reset for SWD transportMatthias Welwarsky
Change b0698501b0e789091e9f9f1427b32af304888769 fixed reset for i.MX6 and TI Sitara SoCs but broke reset for cortex-a targets that use SWD. This patch is a work- around that forces asserting SRST when SWD is used. Change-Id: I7e39f2a469b9b4b2b74ad48ba49f2eeb58528921 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3641 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08cortex_m: allow setting debug ap during createMatthias Welwarsky
This patch adds a Cortex-M private configuration option that allows setting the acess point during target creation. This circumvents situations in hybrid systems when the correct access point can not be automatically detected. Change-Id: If313a5250e6e66509bb9080f3498feab7781dced Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3639 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08helper: Code cleanup for hexify()Marc Schink
Simplify hexify() and do not longer use 0 as special case for the parameter 'count' to determine the string length of the binary input. Instead, use strlen() outside of the function if needed. Additionally, fix the return value and return the length of the converted string. The old function always returned 2 * count. Also, use more appropriate data types for the function parameters and add a small documentation. Change-Id: I133a8ab786b8f7c1296afcaf9c0a0b43881e5112 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3793 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08semihosting: support fileio operationSteven Stallion
This patch adds support for bridging semihosting to GDB's File-I/O remote protocol extension. For the most part operations match up 1:1, however some require a working area to complete successfully, namely operations that devolve to read, stat, and gettimeofday. A new command was added to enable support for fileio named `arm semihosting_fileio`, which ensures that the default behavior remains intact for those that prefer it. Finally, redundant logging was removed from the target_arch_state function; this permits ARM targets to quiesce log output when polling for a fileio reply. This prevents filling the logs with halt/resume messages when using semihosting fileio. Change-Id: Ifbb864fc2373336a501cc0332675b887b552e1ee Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/3566 Tested-by: jenkins Reviewed-by: Steven Stallion <sstallion@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08Cortex-R: Force usage of physical memory read/write since there is no MMUEvan Hunter
Change-Id: I69d6e6301ab66744258fe650a76c7241bebe00a8 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/3203 Tested-by: jenkins Reviewed-by: Girts Folkmanis <opensource@girts.me> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08target: Add verify_image_checksum commandMatthias Welwarsky
This avoids the secondary binary search if the checksum is different Change-Id: I986ba7687cea76f30e37a6bca58aabde18198263 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/2869 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08dap_dp_init: remove loopJiri Kastner
current loop sounds to me like 'we don't know what we do, let's do it ten times, maybe we will have luck'. should be enough to 'ping' debug port using reading CRTL_STAT. tested on cortex-a8, snapdragon, jetson k1, cortex-r5, cortex-r4 Change-Id: Ibc62ac1eca06c141f4fccd5de7b11350ca1f35fd Signed-off-by: Jiri Kastner <cz172638@gmail.com> Tested-by: Jiri Kastner <cz172638@gmail.com> Reviewed-on: http://openocd.zylin.com/3193 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Liviu Dudau <liviu@dudau.co.uk> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08cortex_a: remove partnum magic from arp_examine and dbginitMatthias Welwarsky
Depending on the Debug implementation the "OS Lock" feature might be implemented or not. It is not actually depending on the part number of the implemented ARM core but on the DBGOSLSR.OSLM bits. This patch removes querying the part number and implements proper parsing of OSLM. Result is a more generic approach that will work out-of-box on more devices. Change-Id: I79e052869c2f9af1d7fdedef42faddb7292e7332 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3213 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08Add -defer-examine option to target create commandMatthias Welwarsky
The '-defer-examine' option to target create allows declaring targets that are present on the chain, but not fully functional. They will be skipped by the initial arp_examine as well as arp_examine after reset. Manual examine using 'arp_examine' is needed to examine them, with the idea that some kind of actions is neeed to bring them to a state where examine will succeed (if at all possible). In order to allow value less options to target command, I had to relax the goi.argc check in jim_target_configure(). Change-Id: I9bf4e8d27eb6476dd9353d15f48965a8cfd5c122 Signed-off-by: Esben Haabendal <esben@haabendal.dk> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3076 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-11-05Replace "daemon" with "server" in user-visible stringsPaul Fertser
Since OpenOCD doesn't fit most common definitions of the word "daemon", using it in the documentation is confusing. Reported by IRC user ohsix. Change-Id: I688d722771b084b17c2a7af8e83fd64bab6141b8 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3634 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-11-04cortex_a/r/m: fix handling of un-examined coresMatthias Welwarsky
On multi-core systems, with some cores in power-down state, examination will fail for these cores. Make sure assert- and deassert_reset functions don't crash due to uninitialized variables. Change-Id: I472f8d19af2cd3c770c05f3e57a31b35a863b687 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3552 Tested-by: jenkins Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-11-04semihosting armv7a: Add support for ARMv7-AAndrey Smirnov
Add semihosting support for ARMv7-A based processors. Tested with custom Vybrid VF610 based board and Pandaboard ES (Rev. B1) board (Cortex-A9). Change-Id: I6b896a61c1c6a1c5dcf89de834486f82dd6c80a2 Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Tsung-Han Lin <tsunghan.tw@gmail.com> Reviewed-on: http://openocd.zylin.com/2908 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-11-04Tcl commands: Fix improper return status in flash commands and load_image.HarishKumar
Nand write command : nand_fileio_cleanup() always returns ERROR_OK. Due to this, handle_nand_write_command() retuns ERROR_OK in the case of nand failure. ERROR_FAIL should be returned. Flash erase_sector command : handle_flash_erase_command() always returns ERROR_OK even if the erase functionality of actual driver implementation fails. retval value should be returned. Flash write_bank command : handle_flash_write_bank_command() returns ERROR_OK even if fileio_open() and fileio_read fails. ERROR_FAIL should be returned. Load_image command : handle_load_image_command() retuns ERROR_OK even if image_open() fails. ERROR_FAIL should be returned. When the buffer is null, breaking the loop without setting retval = ERROR_FAIL would cause load_image to return ERROR_OK. Change-Id: Ice32f6036971ab5e8e4dd65edf54b394b001c80c Signed-off-by: HarishKumar <harishpresent@gmail.com> Reviewed-on: http://openocd.zylin.com/2431 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-11-04Make OpenOCD build using -Og.Tim Newsome
With -Og gcc doesn't perform as many optimizations, and as a result warns about some code that it wouldn't otherwise warn about. These fixes all assign values to otherwise uninitialized variables. Change-Id: I9a6ea5eadd73673891ecfec568b8b00d78b596a5 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/3779 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-10-30flash/nor: Add erased_value to drivers and pass it to targetsAndreas Färber
struct flash_driver has a default_padded_value field that is similar, but it can be changed by the user for the specific purpose of padding. Add a new erased_value field and initialize it for all targets, particularly stm32lx, xmc4xxx and virtual. Use this value in core.c:default_flash_mem_blank_check(), the slow path. Extend the target API to pass erased_value down to target code. Adding an argument ensures that we catch all callers. This allows us to merge xmc4xxx.c:xmc4xxx_blank_check_memory() into armv7m:armv7m_blank_check_memory(). It further allows us to use default_flash_blank_check() in place of xmc4xxx.c:xmc4xxx_flash_blank_check(), adding a potential slow path fallback, as well as stm32lx:stm32lx_erase_check(), adding the potential armv7m fast path with fallback to default_flash_mem_blank_check(). Fix a mips32 code comment while at it (zeroed -> erased). The armv4_5 and mips32 target implementations will now error out if an erase value other than 0xff is used, causing default_flash_blank_check() to fall back to the default_flank_mem_blank_check() slow path. Change-Id: I39323fbbc4b71c256cd567e439896d0245d4745f Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3497 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17target: Clean up format stringsAndreas Färber
Clean up some type casts and misuses of format specifiers in preparation for target address type changes. Change-Id: Idf08286f41bca636e35a09e8ddc1d71af3d6e151 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3717 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17target: Add missing spaces in error messagesAndreas Färber
Insert a space before parenthesis in logs that we will need to touch for 64-bit target addresses. While at it, do a couple more surrounding whitespace fixes. Change-Id: I1080c0470aab51cf7bd56e67e934344d0bf4c5c1 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3716 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-10-17breakpoints: Add missing space in error messageAndreas Färber
A space after the format specifier was missing. Change-Id: Ib67eb0fb0d6e05d765206d30d5e4a74cb41bb47b Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3715 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17target: Fix working_area_phys_spec commentAndreas Färber
working_area_phys_spec clearly refers to the physical, not virtual address. Change-Id: I639ea00bb5d05e845b8a56815a571375849f1225 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3714 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-10-04cortex_m: fix autoincrement range of Cortex-M7Tomas Vanek
Cortex-M7 has autoincrement range only 1024 bytes, surprisingly smaller than M3, M4. Change-Id: I35ff1f0e093aac4af79f98eb3b8058d4295942d1 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3737 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04nds32: Fix typo in debug logAndreas Färber
wathcpoint -> watchpoint Change-Id: If84cfb5097ed17ef97491667c622ba7d870ac9c2 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3673 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04x86_32_common: Fix typo in function nameAndreas Färber
pyhs -> phys Change-Id: Ie7edc74f1693b42f26e1e8475a93a7a6b9255cdd Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3672 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-10-04mips: Added #define for scan_delay legacy mode default valueKent Brinkley
Believe in using defines to make maintenance easier. Change-Id: I8edf151352131bbf2b884dfcd67ca5764b11b13c Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com> Reviewed-on: http://openocd.zylin.com/2350 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-08-13target: check late abort from target in async_algorithmTomas Vanek
target_run_flash_async_algorithm() ignored abort from target (rp set to 0) when raised after all data have been written in fifo. I could result e.g. in not reported error during flash write. The change adds rp test after target algorithm has finished. Change-Id: Iadd93371e4a4602737be10079479285d81ae41b2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3560 Tested-by: jenkins Reviewed-by: Steven Stallion <stallion@squareup.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-10Cortex-M7 handling.Andreas Bolsch
- FPU detection and FPU register support added for Cortex-M7. There is no apparent difference between FPv4 and FPv5_SP but ... - Autoincrement range for MEM-AP added for Cortex-M7 This patch together with #3526 replaces #3123 except for stm32f7x.cfg. Change-Id: I5ed5392e3835674160563ff37d67622a7bf2c877 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/3531 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09adi_v5_jtag: clear sticky overrun condition in WAIT timeoutMatthias Welwarsky
If WAIT recovery fails (times out), an ABORT command is issued to the DAP but under some conditions the SSTICKYORUN bit in CTRL/STAT is not cleared as well, which renders the DP unusable. This happens when trying to access e.g. the ROM table of powered-down cores, on many targets. Change-Id: Id0a7ba6180069eee562871314f520f938df9718f Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3476 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09target: add "phys" argument to mem2array, array2memMatthias Welwarsky
Allow using physical addresses with mem2array and array2mem. In order to minimize the impact on existing scripts, "phys" is added as an optional 5th parameter to both commands. This patch also adds "phys" variants to the memwrite/memread commands in memory.tcl. Change-Id: Ia6307f9d861789e7f3ccf1f98961d666bf8d85d6 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3387 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-09Fix resume when core state has been modifiedMatthias Welwarsky
Sometimes it is necessary to resume into a different state (ARM/Thumb) than at debug state entry. According to the documentation this should be possible with "arm core_state arm|thumb" before the resume command, however the original code also restores the original CPSR, which overrides whatever state the core was set to. This seems to work on some cores (e.g. Cortex-A5) but not on others (e.g. Cortex-A9). Using the "BX" instruction to set resume PC and core state works on Cortex-A9 and ARM11, but is not sufficient on Cortex-A5, where an explicit write to the PC (MOV pc, r0) is required additionally. Change-Id: Ic03153b4b250fbb8cf6c75f8e329fb34829aa35f Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3386 Tested-by: jenkins Reviewed-by: Alexander Stein <alexanders83@web.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-07-19Fix usage of timeval_ms()Andreas Färber
First, fix the timeval_ms() implementation to not have K&R but ANSI argument semantics by adding a missing void. timeval_ms() returns an int64_t, not uint64_t or long long. Consistently use int64_t for variables and PRI*64 as format string. While at it, change a few related variables to bool for clarity. Note that timeval_ms() may return a negative error code, but not a single caller checks for that. Change-Id: I27cf83e75b3e9a8913f6c43e98a281bea77aac13 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3499 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-07-17arm_adi_v5: add dap apreg command for AP register read/writeTomas Vanek
A developer tool: Direct access to AP registers can be useful for handling vendor specific AP like Freescale Kinetis MDM or Atmel SMAP. Change-Id: Ie2c7160fc6b2e398513eb23e1e52cbb52b88d9bd Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2777 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-07-04swd: Add support for connect_assert_srst for SWD.Fredrik Hederstierna
Today the reset option for connect_assert_srst is not done for SWD. This patch adds this to SWD and make it possible to connect to targets which might disable JTAG interface when running. Change-Id: Ib89f7cf59b628e8f0b5fca9dd9e362e383c4b99f Signed-off-by: Fredrik Hederstierna <fredrik@hederstierna.com> Reviewed-on: http://openocd.zylin.com/3018 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-06-23Support for Freescale LS102x SAPEsben Haabendal
The SAP in LS102x SoC's from Freescale is able to read and write to all physical memory locations, independently of CPU cores and DAP. This implementation is 100% based on reverse-engineering of JTAG communication with an LS1021A SAP using a JTAG debugger with SAP support. And as such, this code is for now "works-for-me", pending verification by other OpenOCD users, or even better, actual information from Freescale on the SAP interface. Change-Id: Ibb30945e017894da5c402f9f633fc513bed4e68c Signed-off-by: Esben Haabendal <esben@haabendal.dk> Reviewed-on: http://openocd.zylin.com/3096 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-05-24Make #include guard naming consistentMarc Schink
Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2956 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24Remove FSF address from GPL noticesMarc Schink
Also make GPL notices consistent according to: https://www.gnu.org/licenses/gpl-howto.html Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3488 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv4_5: Integrate build of checksum codeAndreas Färber
Add rules to build armv4_5_crc.inc, and convert the code to target endianness the least intrusive way. Change-Id: I7452b2c7e679dae14f9cda5f89bc81c16fc12cad Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3473 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-05-22armv4_5: Integrate build of erase check codeAndreas Färber
Add rules to build armv4_5_erase_check.inc, and convert the code to target endianness the least intrusive way. Drop an unused word from the assembler sources to make the ARM bytecode fully match that of armv4_5.c and to not break ARMv4 assumptions. This completes the build rules for contrib/loaders/erase_check directory. Change-Id: I36be7a944e26142088195fa3fb072d4e577bf328 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3135 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv7m: Integrate build of checksum codeAndreas Färber
Add rules to build armv7m_crc.inc and include it via preprocessor. Change-Id: I4482c7acb8454de28bdf210d9f06c0720ada490a Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3474 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv4_5: Improve arm_checksum_memory() error handlingAndreas Färber
Clean up the working area in case writing fails. Change the error handling paradigm to avoid duplication. Change-Id: Ie3f95f992a98a1325428e4032a1c17346d4c9977 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3472 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv4_5: Improve arm_blank_check_memory() error handlingAndreas Färber
Clean up the working area in case writing fails. Change the error handling paradigm to avoid duplication. Change-Id: I95bb12fbe7c80b594e178468bcd4f6387c682c93 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3471 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-20Fix spelling of ARM CortexAndreas Färber
It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn or CortexXn. Further it's Cortex-M0+, not M0plus. Cf. http://www.arm.com/products/processors/index.php Consistently write it the official way, so that it stops propagating. Originally spotted in the documentation, it mainly affects code comments but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output. Found via: git grep -i "Cortex " git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu" git grep -i "CortexM" Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3483 Tested-by: jenkins Reviewed-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-20cortex_a: Rename APB-AP to CPU in memory contextsAndreas Fritiofson
Memory accesses are not made through the APB-AP, they are made through the CPU (which happens to be controlled over the APB-AP). Rename all irrelevant uses of the APB-AP term. And fix the long standing typo in the function names... Change-Id: Ide466fb2728930968bdba698f0dd9012cc9dbdf9 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3216 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-17arm_adi_v5: Add part number for TI MSP432P401RAndreas Färber
According to the MSP432P4xx Family TRM (SLAU356A) Figure 4-7, 0x9AF is the part number for MSP432P401xx devices. Verified on TI MSP-EXP432P401R LaunchPad. Change-Id: I22b57c42f2a0dc8263fab6b480cf8c169c7dc295 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3486 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-17arm_adi_v5: Add part numbers for Infineon XMC4000 familyAndreas Färber
This was found on multiple XMC4500: Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x00001c11db Designer is 0x0c1, Infineon (Siemens) Part is 0x1db, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus On multiple XMC4700 and an XMC4800 this was found instead: Valid ROM table present Component base address 0xe00ff000 Peripheral ID 0x00001c11df Designer is 0x0c1, Infineon (Siemens) Part is 0x1df, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus Name them "XMC4500 ROM" and "XMC4700/4800 ROM" respectively. Change-Id: If369a6d16524004ba439b878f090a313a9f3a760 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3482 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-17arm_adi_v5: Add part number for Infineon XMC1000 familyAndreas Färber
Not documented in the Reference Manuals but found on multiple XMC1100/1202: Valid ROM table present Component base address 0xf0000000 Peripheral ID 0x00001c11ed Designer is 0x0c1, Infineon (Siemens) Part is 0x1ed, Unrecognized Component class is 0x1, ROM table MEMTYPE system memory present on bus Name it "XMC1000 ROM", since it didn't differ between XMC1100 and XMC1200. Change-Id: I98a5a524c0d0836f395400fbac24fd496b2ec141 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3481 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-17arm_adi_v5: Adjust part number column alignmentAndreas Färber
Consistently increase the space-indentation of the .full values to nicely align with the new "Qualcomm QDSS Component v1" .type value. Change-Id: Icd28d8f3fc7c3afcccb9dcfe138ac57d64927d1a Suggested-by: Freddie Chopin <freddie.chopin@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3480 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins
2016-05-17arm_adi_v5: Update DP (Debug Port) registers defined in ADIv5.2.Andreas Fritiofson
Note: WCR (Wire Control Register) is replaced by DLCR (Data Link Control Register). And only TURNROUND field is modifiable. [andreas.fritiofson@gmail.com]: Rename DP_IDCODE to DP_DPIDR as well. Sort list by address and align it using spaces instead of tabs. Add comments about supporting DP versions. Remove non-functional wcr command completely. Change-Id: Ic6b781b07c8eead8b0237d497846d0da060cb1ba Signed-off-by: Alamy Liu <alamy.liu@gmail.com> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3244 Tested-by: jenkins
2016-05-14arm_adi_v5: Reorder Atmel part number entryAndreas Färber
Instead of placing Atmel last, after ANY_ID, place it after ARM (it's arm_adi_v5 despite 0x4BB) and sort it with the other vendors, i.e. before ADI and Qualcomm. Adapt column alignment. Drop the redundant "Atmel" comment to clarify that Analog is not Atmel. Change-Id: Ic06785db079cf58d49815a639236636c180e5e17 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3479 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-20 19:13:45 +0000