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2014-03-17flash: Constify write bufferAndreas Fritiofson
Change-Id: Ic812098d3ed5a2992c26bb57d08ae350e2c5d5d8 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2040 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05update files to correct FSF addressSpencer Oliver
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2012-04-10doxygen: remove warningsSpencer Oliver
Change-Id: I020845a8df7b67f3b6c1a233b3ee07a5d14fa685 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/556 Tested-by: jenkins
2012-02-06build: cleanup src/target directorySpencer Oliver
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2011-12-11dsp5680xx - indent fixrodrigo_l_rosa
no logic changes, only coding style (spaces to tabs, etc) Change-Id: I5933447c633990e103bc62d088ca2e12f11f031d Signed-off-by: rodrigo_l_rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/253 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - flash module clk to freescale cfg valuerodrigo_l_rosa
the flash module clock was set according to a spreadsheet from freescale, now it's set according to the configuration file used by the Freescale Flash Programmer. both work, but i think it's better to use the one used by a software that's made by Freescale (should be correct...) Change-Id: I382197a3eb43dd47ff4b9b83d5e05008d5613fc6 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/223 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - separate debug from haltrodrigo_l_rosa
i had assumed two possible halt/debug states: - halted + debug mode - running + not debug mode turns out this one also exists - halted + NOT in debug mode added code to handle this in an appropiate way. Change-Id: Ia0ddcd55d1890c90d100a9e6f5e84ed8dda812a3 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/220 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - added more error codesrodrigo_l_rosa
Change-Id: I36962a0ab0cc9d1eb6a29d7e577c24c38cab946b Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/218 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - fix jtag status maskrodrigo_l_rosa
Change-Id: I17a0f22cbeb20e4f6ea4065236243f93d826ccf0 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/217 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - relocating coderodrigo_l_rosa
moved reset_jtag to the top, since it will be needed in future changes. also send a define to the .h Change-Id: I53ef9c02ffa70e7d0416364525a6fbfef855e222 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/216 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - error codesrodrigo_l_rosa
added logging of target error codes to enable automatic error handling from tcl. the plan is to use a computer to execute a series of tcl commands, the changes allow simple parsing of return messages to detect errors. Change-Id: Ia98d3bd036e1b6065b475ffff6c1d30baeaf7417 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/215 Tested-by: jenkins Tested-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-08-30optional crc for flash writingRodrigo L. Rosa
crc check was always performed on newly flashed data, now it is optional flash mem can be locked by writing a specific word to a specific address in flash. to verify flash, target must be halted, and this will (when the new halt sequence is implemented) require reseting the chip. if the target is reset after writing the lock words, then it will lock, hence the CRC will fail because it is not possible to read stuff from the target. also added a function that resets the jtag state machine. this is not used yet, but will be soon. it is implemented to allow strict control over JTAG state machine, necessary to implement to halt and unlocking sequences.
2011-08-30def syntax to match tap irlenRodrigo L. Rosa
the master tap has a 4 bit irlen changed the instructions to be 4 bit, ie, removed the zeros. it makes it clearer to interpret.
2011-06-28dsp5680xx: fix compilation problemsØyvind Harboe
use a more specific global variable name than "context", which can easily conflict with other things.
2011-06-12doxy moreRodrigo L. Rosa
2011-06-12doxy & cleanupRodrigo L. Rosa
2011-06-12cleanup trailing whitespacesRodrigo L. Rosa
2011-06-12fix flash driver size, sector eraseRodrigo L. Rosa
2011-05-19flashing speed improved using queued jtag. error propagation improved.Rodrigo L. Rosa
2011-05-18partial support for 568013 and 568037, target integration.Rodrigo L. Rosa