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2009-09-01- fix a regression when using cortex_m3 emulated dcc channelntfreak
git-svn-id: svn://svn.berlios.de/openocd/trunk@2659 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-25David Brownell <david-b@pacbell.net> Tweak disassembly commands:oharboe
For ARMv4/ARMv5: - better command parameter error checking - don't require an instruction count; default to one - recognize thumb function addresses - make function static - shorten some too-long lines For Cortex-M3: - don't require an instruction count; default to one With the relevant doc updates. --- Nyet done: invoke the thumb2 disassembler on v4/v5, to better handle branch instructions. git-svn-id: svn://svn.berlios.de/openocd/trunk@2624 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-19David Brownell <david-b@pacbell.net> Clean up some Cortex-M3 reset handling.oharboe
- AIRCR_SYSRESETREQ is generic; use it on any system where SRST won't fly, not just on Stellaris-based ones. - Reformat and improve comments about the Stellaris quirk; and xref the only public docs (an email) about the issue. It seems that *most* Stellaris chips have this problem. Tempest parts aren't yet in general sampling; and if rev B silicon for earlier chips exists, it's not very visible yet. git-svn-id: svn://svn.berlios.de/openocd/trunk@2595 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-18David Brownell <david-b@pacbell.net> Add "cortex_m3 vector_catch" command ↵oharboe
and docs. One minor issue with this is that the core debug support uses this mechanism, then trashes its state over reset. Users can Work around that (for now) by re-assigning the desired config after reset. Also fixes "target halted due to target-not-halted" goof. When we can't describe the reason using OpenOCD's limited vocabulary, say "reason undefined" instead of saying it's not halted. git-svn-id: svn://svn.berlios.de/openocd/trunk@2588 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-21David Brownell <david-b@pacbell.net>:ntfreak
Clean up treatment of registers in ARMv7-M and Cortex-M3. - At the arch level: * Just list registers and names; don't impose core-specific policy about how they are accessed. * Each register has a symbol. * Remove the register mode field (irrelevant to debugger) - At the core/implementation level: * Just map the registers to their relevant access methods; don't require the arch level to say how that should work (cores other than Cortex-M3 could do it differently). * Don't use undefined bits from register 20. * Use register IDs that are part of the ARMv7-M interface. In short, there's now a real distinction between the arch and core layers. git-svn-id: svn://svn.berlios.de/openocd/trunk@2554 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-21David Brownell <david-b@pacbell.net>:ntfreak
Revert parts of the previous ARMv7-M register patch. It turns out that part of the issue is a documentation problem for the Cortex-M3 r1 parts. So for the rest, simpler fixes are possible (in followup patch). git-svn-id: svn://svn.berlios.de/openocd/trunk@2552 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-16Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>, ↵zwelch
David Brownell <david-b@pacbell.net>: Some cleanup of the ARMv7-M support: - Reference the relevant ARMv7-M ARM doc (DDI 0405C to non-Vendors), and update the Cortex-M3 doc refs (DDI 0337C is no longer available). - Those registers aren't actually general, and some are incorrect (per all public docs anyway). Update comments and code accordingly. * What the Core Debug facility exposes is *implementation-specific* not architectural. These values aren't fully portable. They match Cortex-M3 ... so no current implementation will make trouble, but the next v7m implementation might. * Four of the registers are actually not exposed that way. Before Cortex-M3 r2p0 they are read/written through MRS/MSR instructions. In that newest silicon, they are four bytes in one register, not four separate registers. - Update the CM3 code to report when that one register is available, and not try to access it when it isn't. Also declare the register numbers that an eventual MRS/MSR solution will need to be using. - Stop line wrapping the exception labels. So for parts before r2p0 OpenOCD behavior is effectively unchanged, and still buggy; but for those newer parts a few things might now be correct. Most current Cortex-M3 parts use r1p1 (or earlier); this seems to include most LM3S parts and all STM32 parts. Parts using r2p0 are available, and include fourth generation LM3S parts ("Tempest") plus AT91SAM3 and LPC17xx parts which are now sampling. git-svn-id: svn://svn.berlios.de/openocd/trunk@2543 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-15David Brownell <david-b@pacbell.net>:zwelch
Initial support for disassembling Thumb2 code. This works only for Cortex-M3 cores so far. Eventually other cores will also need Thumb2 support ... but they don't yet support any kind of disassembly. - Update the 16-bit Thumb decoder: * Understand CPS, REV*, SETEND, {U,S}XT{B,H} opcodes added by ARMv6. (It already seems to treat CPY as MOV.) * Understand CB, CBNZ, WFI, IT, and other opcodes added by in Thumb2. - A new Thumb2 instruction decode routine is provided. * This has a different signature: pass the target, not the instruction, so it can fetch a second halfword when needed. The instruction size is likewise returned to the caller. * 32-bit instructions are recognized but not yet decoded. - Start using the current "UAL" syntax in some cases. "SWI" is renamed as "SVC"; "LDMIA" as "LDM"; "STMIA" as "STM". - Define a new "cortex_m3 disassemble addr count" command to give access to this disassembly. Sanity checked against "objdump -d" output; a bunch of the new instructions checked out fine. git-svn-id: svn://svn.berlios.de/openocd/trunk@2530 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-12Magnus Lundin Thc cortex_m3_poll function does not identify that a target ↵oharboe
is running unless we transition from RESET. This patch correctly identifies a running target. Patch made a tad more palatable by David Brownell <david-b@pacbell.net> git-svn-id: svn://svn.berlios.de/openocd/trunk@2510 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-28Refactor code, create target_state_name()duane
git-svn-id: svn://svn.berlios.de/openocd/trunk@2409 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-27Add Breakpoint/Watchpoint unique ID to help debug hardware debug register ↵duane
leakage git-svn-id: svn://svn.berlios.de/openocd/trunk@2408 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23Remove whitespace that occurs before ')'.zwelch
- Replace '[ \t]*[)]' with ')'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2377 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23Remove whitespace that occurs after '('.zwelch
- Replace '([ \t]*' with '('. git-svn-id: svn://svn.berlios.de/openocd/trunk@2376 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Fixes '[|]' whitespacezwelch
- Replace ')\([|]\)(' with ') \1 ('. - Replace ')\([|]\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\([|]\)(' with '\1 \2 ('. - Replace '\(\w\)\([|]\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2374 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Fixes '=' whitespacezwelch
- Replace ')\(=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(=\)(' with '\1 \2 ('. - Replace '\(\w\)\(=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2372 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Fixes '<<' whitespacezwelch
- Replace ')\(<<\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(<<\)(' with '\1 \2 ('. - Replace '\(\w\)\(<<\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2370 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Fixes '!=' whitespacezwelch
- Replace ')\(!=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(!=\)(' with '\1 \2 ('. - Replace '\(\w\)\(!=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2363 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Replace 'while(' with 'while ('.zwelch
git-svn-id: svn://svn.berlios.de/openocd/trunk@2358 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Replace 'if(' with 'if ('.zwelch
git-svn-id: svn://svn.berlios.de/openocd/trunk@2357 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-21C99 printf() -Werror fixesduane
git-svn-id: svn://svn.berlios.de/openocd/trunk@2313 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18Transform 'u32' to 'uint32_t' in src/targetzwelch
- Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2279 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18Transform 'u16' to 'uint16_t'zwelch
- Replace '\([^_]\)u16' with '\1uint16_t'. - Replace '^u16' with 'uint16_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18Transform 'u8' to 'uint8_t' in src/targetzwelch
- Replace '\([^_]\)u8' with '\1uint8_t'. - Replace '^u8' with 'uint8_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-09Encapsulate jtag_reset_config using accessors:zwelch
- Update handle_reset_config_command in tcl.c to use new helpers. - Replace direct accesses in JTAG interface and target drivers. git-svn-id: svn://svn.berlios.de/openocd/trunk@2161 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-09Encapsulate the jtag_trst and jtag_srst variables:zwelch
- Add accessor functions to return their value. - Use new SRST accessor in cortex_m3.c and mips_m4k.c git-svn-id: svn://svn.berlios.de/openocd/trunk@2157 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-04- add support for different TAR autotincrement sizes as per ARM ADI spec.ntfreak
- set TAR size to 12 bits for Cortex-M3. - Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu]. git-svn-id: svn://svn.berlios.de/openocd/trunk@2051 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-02- change signature for adi_jtag_dp_scan and adi_jtag_dp_scan_u32 to use ↵ntfreak
swjdp_common_t *swjdp instead of arm_jtag_t *jtag_info - change SWJDP_IR/DR_APACC to DAP_IR/DR_APACC to conform with ARM_ADI docs. - add swjdp->memaccess_tck field and code for extra tck clocks before accessing memory bus - Set default memaccess value to 8 for Cortex-M3. - Add dap memaccess command. - document all armv7 dap cmds. - Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu]. git-svn-id: svn://svn.berlios.de/openocd/trunk@2005 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-01David Brownell <david-b@pacbell.net>:zwelch
Whitespace fixes. git-svn-id: svn://svn.berlios.de/openocd/trunk@1973 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-31Final step in isolating target_type_s structure:zwelch
- Move definition of 'struct target_type_s' into new 'target_type.h' file. - Forward delclaration remains in target.h, with comment pointing to new file. - Replaces #define with #include in source files. git-svn-id: svn://svn.berlios.de/openocd/trunk@1971 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-31First step in hiding target_type_s from public interface:zwelch
- Add DEFINE_TARGET_TYPE_S symbol in files that need it defined. - Forward declare 'struct target_type_s' only, unless that symbol is defined. git-svn-id: svn://svn.berlios.de/openocd/trunk@1969 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-31Add wrappers for target->type->examined:zwelch
- replace all checks of target->type->examined with target_was_examined(). - replace all setting of target->type->examined with target_set_examined(). - replace clearing of target->type->examined with target_reset_examined(). - add documentation in target_s to warn not to access field directly. git-svn-id: svn://svn.berlios.de/openocd/trunk@1962 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-31Add target_write_memory wrapper:zwelch
- replaces all calls to target->type->write_memory. - add documentation in target_s to warn not to invoke callback directly. git-svn-id: svn://svn.berlios.de/openocd/trunk@1960 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-31Add target_read_memory wrapper:zwelch
- replaces all calls to target->type->read_memory. - add documentation in target_s to warn not to invoke callback directly. git-svn-id: svn://svn.berlios.de/openocd/trunk@1959 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-11Audit and eliminate redundant #include directives in other target files.zwelch
git-svn-id: svn://svn.berlios.de/openocd/trunk@1715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-04-27Changed armv7m and cortexm3 to use nev arm_adi_v5 instead of cortex_swjdp.mlu
Added support for accessport ROM table identification, dap command. git-svn-id: svn://svn.berlios.de/openocd/trunk@1536 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-04-19Zach Welch <zw@superlucidity.net> fix -Werror warningsoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@1472 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-03-16- fix issue with cortex_m3 reset run. Thanks Perry Hungntfreak
- https://lists.berlios.de/pipermail/openocd-development/2009-March/005028.html git-svn-id: svn://svn.berlios.de/openocd/trunk@1413 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-12-13- remove target specific variant and use target->variant memberntfreak
- fix build warning in cortex_m3 - code cleanup - remove trailing lf and convert c++ comments git-svn-id: svn://svn.berlios.de/openocd/trunk@1238 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-12-12- check cortex_m3 FPB is enabled when setting hardware breakpointntfreak
- Thanks Igor Skochinsky git-svn-id: svn://svn.berlios.de/openocd/trunk@1231 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-11-30jtag newtap change & huge manual updateduane
git-svn-id: svn://svn.berlios.de/openocd/trunk@1194 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-11-21- add new cortex_m3 maskisr cmdntfreak
git-svn-id: svn://svn.berlios.de/openocd/trunk@1181 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-11-20- preserve cortex_m3 C_MASKINTS during resume/stepntfreak
git-svn-id: svn://svn.berlios.de/openocd/trunk@1179 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-11-14- stops multiple calls to examine from allocating the breakpoint arraysntfreak
git-svn-id: svn://svn.berlios.de/openocd/trunk@1171 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-11-02Rick Altherr <kc8apf@kc8apf.net> - In cortex_m3_resume if debug_execution ↵oharboe
is non-zero, the PRIMASK and xSPR are modified. The problem is that while the register value is changed, it isn't marked valid or dirty. git-svn-id: svn://svn.berlios.de/openocd/trunk@1119 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-10-15Laurentiu Cocanu - memory read/write and exit() error path fixesoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@1064 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-09-27- convert spaces to tabs in at91sam7.[ch]ntfreak
- add missing svn props git-svn-id: svn://svn.berlios.de/openocd/trunk@1009 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-09-26 I do not know why this is necessary, but it fixes strange effectsoharboe
(step/resume cause a NMI after reset) on LM3S6918 -- Michael Schwingen git-svn-id: svn://svn.berlios.de/openocd/trunk@1008 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-09-20- added myself to copyright on files i remember adding large contributions ↵ntfreak
for over the years - cleaned up headers to match rest of code - added missing svn props for previously added files git-svn-id: svn://svn.berlios.de/openocd/trunk@987 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-09-01Duane Ellis: "target as an [tcl] object" feature.oharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@975 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-08-24duan ellis target tcl work in progressoharboe
converts a number of 'simple string lookup tables' into NVP tables. These NVP tables will be used by various commands coming in the next patch. git-svn-id: svn://svn.berlios.de/openocd/trunk@962 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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