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path: root/src/target/cortex_a8.c
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2009-11-16target: no implicit #includes of "register.h"David Brownell
Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-16target: don't implicitly include "breakpoint.h"David Brownell
Most files in the tree seem to have ended up including this, and *quite* needlessly ... only code implementing or using breakpoints actually needs these declarations. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-15ARM: memory utils aren't ARM7/ARM9 dependentDavid Brownell
The arm7_9_checksum_memory() and arm7_9_blank_check_memory() routines are not actually specific to the ARM7 and ARM9 core generations ... they can work for any core which can run algorithms using basic ARM (not Thumb) instructions. Rename them; move the declarations to a more generic site; likewise move the code (and tidy it a bit in the process). NOTE: the blank_check() method falsely returned a success status (0) on one error path, when the algorithm failed. Fixed this bug. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-15target: make "examined" flag be per-targetDavid Brownell
Previously this flag was stored in "target_type", so that for example if there were two ARM7TDMI targets in a scan chain, both would claim to have been examined although only the first one actually had its examine() method called. Move this state to where it should have been in the first place, and hide a method that didn't need exposure ... the flag is write-once. Provide some doxygen. The examine() method is confusing, since it isn't separating one-time setup from the after-each-reset stuff. And the ARM7/ARM9 version is, somewhat undesirably, not leaving the debug state alone after reset ... probably more of an issue for trace setup than for watchpoints and breakpoints. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-13command_t -> struct commandZachary T Welch
Remove misleading typedef and redundant suffix from struct command.
2009-11-13command_context_t -> struct command_contextZachary T Welch
Remove misleading typedef and redundant suffix from struct command_context.
2009-11-13target_t -> struct targetZachary T Welch
Remove misleading typedef and redundant suffix from struct target.
2009-11-13target_type_t -> struct target_typeZachary T Welch
Remove misleading typedef and redundant suffix from struct target_type.
2009-11-13armv4_5_common_t -> struct armZachary T Welch
Remove misleading typedef and just use struct arm.
2009-11-13cortex_a8_wrp_t -> struct cortex_a8_wrpZachary T Welch
Remove misleading typedef and redundant suffix from struct cortex_a8_wrp.
2009-11-13cortex_a8_brp_t -> struct cortex_a8_brpZachary T Welch
Remove misleading typedef and redundant suffix from struct cortex_a8_brp.
2009-11-13breakpoint_t -> struct breakpointZachary T Welch
Remove misleading typedef and redundant suffix from struct breakpoint.
2009-11-13working_area_t -> struct working_areaZachary T Welch
Remove misleading typedef and redundant suffix from struct working_area.
2009-11-13reg_cache_t -> struct reg_cacheZachary T Welch
Remove misleading typedef and redundant suffix from struct reg_cache.
2009-11-13cortex_a8_common_t -> struct cortex_a8_commonZachary T Welch
Remove misleading typedef and redundant suffix from struct cortex_a8_common.
2009-11-13armv7a_common_t -> struct armv7a_commonZachary T Welch
Remove misleading typedef and redundant suffix from struct armv7a_common.
2009-11-13swjdp_common_t -> struct swjdp_commonZachary T Welch
Remove misleading typedef and redundant suffix from struct swjdp_common.
2009-11-13jtag_tap_t -> struct jtag_tapZachary T Welch
Search and destroy the jtag_tap_t typedef. This also cleans up a layering violation, removing the declaration from types.h.
2009-11-13use COMMAND_HANDLER macro to define all commandsZachary T Welch
2009-11-13Cortex-A8: fix indentDavid Brownell
The "remove (forward) declarations" patch goofed indentation on the "cortexa8_target" struct; fix. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-11cortex_a8: remove declarations, use static keywordZachary T Welch
2009-11-05Cortex-A8: use the new inheritance/nesting schemeDavid Brownell
Use target_to_armv7a() etc, replacing needless pointer traversals. Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-05cortex_a8: add mrc mcr interface.Øyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-11-05target: remove unused interface fn that clutters codeØyvind Harboe
The quit entry point was not being invoked. Just a source of confusion at this point. XScale ran 100x reset upon quit, but that code made no sense, wasn't commented and never invoke. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-11-05debug interface: get rid of unused pre_debug fnØyvind Harboe
Removing unused code makes it much less mysterius. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-10-13Cleanup: nuke trailling whitespacesYauheni Kaliuta
Signed-off-by: Yauheni Kaliuta <y.kaliuta@gmail.com>
2009-10-02It is not possible to invalidate I-Cache on memory writes while the target ↵mlu
is running git-svn-id: svn://svn.berlios.de/openocd/trunk@2795 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-02Make sure that DSCR_DTR_RX is not full before writingmlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2794 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-02More error reporting in Cortex_a8 execute_opcodemlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2793 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-02Added asser_reset and deassert_reset for cortex_a8mlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2792 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-02Added asser_reset and deassert_reset for cortex_a8mlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2791 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21Remove annoying end-of-line whitespace from most src/*dbrownell
files; omitted src/httpd git-svn-id: svn://svn.berlios.de/openocd/trunk@2742 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-19Avoid cache invalidation when writing to hardware debug registersmlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2733 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-18Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.cmlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2728 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-16Use a variable armv7a->debug_base instead of hardedcoded OMAP3530_DEBUG_BASEmlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2716 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-14Check return values to avoid infinite wait in loop on error.mlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2709 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-14Cache invalidation when writing to memorymlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2708 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-13Fix argument passing in cortex_a8_write_cp.mlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2701 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-08Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.mlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2677 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-07Improved handling of instruction set state, helps for debugging Thumb state.mlu
git-svn-id: svn://svn.berlios.de/openocd/trunk@2674 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode.oharboe
By enabling this bit, the processor halts when a debug event such as breakpoint occurs. git-svn-id: svn://svn.berlios.de/openocd/trunk@2668 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04Matt Hsu <matt@0xlab.org> Tidy up the bit-offset operation for DSCR registeroharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2666 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ↵oharboe
cortex-a8: Wait for the CPU to be halted/started With DCCR we are asking the CPU to halt, we should wait until the CPU has halted before proceeding with the operation. git-svn-id: svn://svn.berlios.de/openocd/trunk@2638 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ↵oharboe
Only dap_ap_select when we are going to do a memory access in the fast reg case. git-svn-id: svn://svn.berlios.de/openocd/trunk@2636 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM ↵oharboe
instruction into the ITR register but it will only be executed when the DSCR[13] bit is set. The documentation is a bit weird as it classifies the DSCR as read-only but the pseudo code is writing to it as well. This is working on a beagleboard. git-svn-id: svn://svn.berlios.de/openocd/trunk@2634 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> Wait for the DTRRX to be full before reading it. ↵oharboe
Remove the trans_mode change as it is done in the mem_ap_read_atomic_u32 function. git-svn-id: svn://svn.berlios.de/openocd/trunk@2633 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ↵oharboe
Before executing a new instruction wait for the previous instruction to be finished. This comes from the pseudo code of the cortex a8 trm. git-svn-id: svn://svn.berlios.de/openocd/trunk@2632 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-25- fix build warningsntfreak
- add svn props to recently added files armv7a.[ch] git-svn-id: svn://svn.berlios.de/openocd/trunk@2618 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-25David Brownell The rest of the Cortex-A8 support from Magnus: replace the ↵oharboe
previous nonfunctional cortex_a8 code with something that at least basically works (for halt/step/resume, without MMU) even if it is incomplete. (With tweaks from Øyvind, and cleanup from Dave.) This code has mainly been developed and tested against R1606, it has been built and tested against R2294 where it runs but step and resume commands are broken due to regression (which should be fixed now). This code is really written for OMAP3530. It doesn't identify debug resources using generic DAP calls to scan the ROM table, or perform topology detection. The OMAP3530 DAP exposes two memory access ports: - Port #0 is connected to L3 interconnect (the main bus) with passthrough to the L4 EMU bus ... so it will be used for most memory accesses. - Port #1 is connected to a dedicated debug bus (L4 EMU), with access to L4 Wakeup, and holds the ROM table ... so it must be used for most debug and control operations. The are some defines to handle this in cortex_a8.c, which should be replaced with more general code. Having access to another Cortex-A8 implementation would help get that right. git-svn-id: svn://svn.berlios.de/openocd/trunk@2609 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23Remove whitespace that occurs after '('.zwelch
- Replace '([ \t]*' with '('. git-svn-id: svn://svn.berlios.de/openocd/trunk@2376 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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