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2009-11-13armv4_5_core_reg_t -> struct armv4_5_core_regZachary T Welch
Remove misleading typedef and redundant suffix from struct armv4_5_core_reg.
2009-11-13armv4_5_algorithm_t -> struct armv4_5_algorithmZachary T Welch
Remove misleading typedef and redundant suffix from struct armv4_5_algorithm.
2009-11-13reg_param_t -> struct reg_paramZachary T Welch
Remove misleading typedef and redundant suffix from struct reg_param.
2009-11-13mem_param_t -> struct mem_paramZachary T Welch
Remove misleading typedef and redundant suffix from struct mem_param.
2009-11-11ETM: remove old mid-level ETM handleDavid Brownell
Now that nothing uses the old ETM handle any more, remove it. Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores access ETM facilities. Now ARM11 could support standard ETM (and ETB) access as soon as it derives from "struct arm" ... its scanchain 6 is used access the ETM, just like ARM7 and ARM9. The Cortex parts (both M3 and A8) will need modified access methods (via ETM init parameters), so they use the DAP. Our first A8 target (OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very useful without SWO trace support (it's painfully stripped down), so that support won't be worth adding for a while. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-11ARM: start generalized base typeDavid Brownell
Rename "struct armv4_5_common_s" as "struct arm". It needs a bit more work to be properly generic, and to move out of this header, but it's the best start we have on that today. Add and initialize an optional ETM pointer, since that will be the first thing that gets generalized. The intent being: all ARMs should eventually derive from this "struct arm", so they can reuse the current ETM logic. (And later, more.) Currently the ARM cores that *don't* so derive are only ARMv7-M (and thus Cortex-M3) and ARM11. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-09src/target: remove 'extern' and wrap headersZachary T Welch
Remove extern keywords from function prototypes and wrap long lines.
2009-11-05target: provide container_of()David Brownell
Provide a cleaner way to handle single inheritance of targets in C, using the same model Linux does: structs containing other structs, un-nested via calls to a "container_of()" macro that are packaged in typesafe inline functions. Targets already use this containment idiom, but make it much more complicated because they un-nest using embedded "void *" pointers ... in chains of up to five per target, which is all pure needless complication. (Example: arm92x core, arm9tdmi, arm7_9, armv4_5 ... on top of the base "target" class.) Applying this scheme consistently simplifies things, and gets rid of many error-prone untyped pointers. It won't change any part of the type model though -- it just simplifies things. (And facilitates more cleanup later on.) Rule of thumb: where there's an X->arch_info void* pointer, access to that pointer can and should be removed. It may be convenient to set up pointers to some of the embedded structs; and shrink their current "*_common" names (annoyingly long). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-23mcr/mrc interface work. Implemented for arm926ejs and arm720t. mcr/mrc ↵Øyvind Harboe
commands added.
2009-10-14portability updatesDavid Brownell
Based on some patches from <redirect.slash.nil@gmail.com> for preliminary Win64 compilation. More such updates are needed, but they need work. Compile tested on 64 and 32 bit Linuxes, and Cygwin. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-09-09David Brownell <david-b@pacbell.net> oharboe
Optionally shave time off the armv4_5 run_algorithm() code: let them terminate using software breakpoints, avoiding roundtrips to manage hardware ones. Enable this by using BKPT to terminate execution instead of "branch to here" loops. Then pass zero as the exit address, except when running on an ARMv4 core. ARM7TDMI, ARM9TDMI, and derived cores now set a flag saying they're ARMv4. Use that mechanism in arm_nandwrite(), for about 3% speedup on a DaVinci ARM926 core; not huge, but it helps. Some other algorithms could use this too (mostly flavors of flash operation). git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-06more debug output for translation of arm mode number to enumoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2481 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-06a bit more debug output for translation of invalid mode numbersoharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@2480 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Fixes '=' whitespacezwelch
- Replace ')\(=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(=\)(' with '\1 \2 ('. - Replace '\(\w\)\(=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2372 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18Transform 'u32' to 'uint32_t' in src/target/arm*zwelch
- Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2278 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-10David Brownell <david-b@pacbell.net> whitespace fixes.oharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@1690 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-04-29Remove redundant declarations to allow building with -Wredundant-decls.zwelch
git-svn-id: svn://svn.berlios.de/openocd/trunk@1560 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-04-19Zach Welch <zw@superlucidity.net> use ARM4_5_MODE_ANY instead of -1oharboe
git-svn-id: svn://svn.berlios.de/openocd/trunk@1474 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-12-13- remove target specific variant and use target->variant memberntfreak
- fix build warning in cortex_m3 - code cleanup - remove trailing lf and convert c++ comments git-svn-id: svn://svn.berlios.de/openocd/trunk@1238 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-09-20- added myself to copyright on files i remember adding large contributions ↵ntfreak
for over the years - cleaned up headers to match rest of code - added missing svn props for previously added files git-svn-id: svn://svn.berlios.de/openocd/trunk@987 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-05-19fix mode output when illegal arm mode is detected. Now prints illegal mode ↵oharboe
for index -1. git-svn-id: svn://svn.berlios.de/openocd/trunk@664 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-05-07This matters for embedded devices, but is probably not observably better for ↵oharboe
PC hosted OpenOCD. git-svn-id: svn://svn.berlios.de/openocd/trunk@647 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2008-02-24- fixed target->type->poll() return valueoharboe
- added arch_state to show status of currently selected target - simplified target->type->arch_state() api. - clean up telnet output a bit - fixed GDB output for arch_state - removed a couple of unecessary exit()'s - cleaned up error propagation a bit in a few places git-svn-id: svn://svn.berlios.de/openocd/trunk@332 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2007-05-29- split fileio handling into fileio part and image handlingdrath
- reworked etm/etb into a generic etm part with trace capture drivers (currently only etb supported) - added XScale debug handler binary to repository - added Thumb disassembling (thanks to Vincent Palatin for this patch) - added support for non-CFI compatible flashes to cfi driver (currently only SST39VFxxx devices supported) This checkin is experimental, not suitable for general use git-svn-id: svn://svn.berlios.de/openocd/trunk@155 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2007-03-28- merged XScale branch back into trunkdrath
- fixed some compiler warnigns in amt_jtagaccel.c, bitbang.c, parport.c - free working area and register stuff if str7x block write algorithm failed - check PC after exiting a target algorithm in armv4_5.c git-svn-id: svn://svn.berlios.de/openocd/trunk@135 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2007-02-03- add missing parentheses around macro parameters (thanks to Matthias Bauch ↵drath
for noticing this bug and providing a fix) git-svn-id: svn://svn.berlios.de/openocd/trunk@130 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-09-04- added debug output for D/I FSR and FAR (arm920t)drath
- fixed bug that caused CPSR to be corrupted in Thumb mode git-svn-id: svn://svn.berlios.de/openocd/trunk@93 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-08-31- endianess fixes everywhere but in the flash code. flashing might still be ↵drath
broken on big-endian targets and/or hosts - added access to ARM920T vector catch register (via generic register mechanism) - don't disable linefills on ARM920T cores - this lead to lockups when accessing lines already contained in cache - read content of ARM920T cache and tlb into file (arm920t read_flash/read_mmu commands) - memory reading improved on ARM7/9, can be further accelerated with new "arm7_9 fast_memory_access enable" command (renamed from fast_writes) - made in_handler independent from in field (makes the handler more flexible) - added timeout to ft2232 when using D2XX library - fixed STR7x protection bit handling on second bank (thanks to Bernard) - added support for using the OpenOCD on AT91RM9200 systems (thanks to Anders Larsen) - fixed AT91SAM7 flash handling when not running from 32kHz clock (thanks to Anders Larsen) git-svn-id: svn://svn.berlios.de/openocd/trunk@90 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-06-02- prepare OpenOCD for branching, created ./trunk/drath
git-svn-id: svn://svn.berlios.de/openocd/trunk@64 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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