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2020-03-12target/cortex_a: add hypervisor modeAntonio Borneo
Hypervisor mode is present only if the optional virtualization extensions are available. Moreover, virtualization extensions require that also security extensions are implemented. Add the required infrastructure for the shadowed registers in hypervisor mode. Make monitor shadowed registers visible in hypervisor mode too. Make hypervisor shadowed registers visible in hypervisor mode only. Check during cortex_a examine if virtualization extensions are present and then conditionally enable the visibility of both hypervisor and monitor modes shadowed registers. Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5261 Tested-by: jenkins
2020-03-12target/armv4_5: remove unused macroAntonio Borneo
The macro ARMV4_5_CORE_REG_MODENUM() is unused. Remove it! Change-Id: I183df57bd86c9428710ea3583e43fba88fd26e0a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5260 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-03-12arm: Use different enum for core_type and core_modeAntonio Borneo
The fields core_type and core_mode use the same enum arm_mode but encode different information, making the code less immediate to read. Use a different enum arm_core_type for the field core_type. The code behavior is not changed. Change-Id: I60f2095ea6801dfe22f6da81ec295ca71ef90466 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5258 Tested-by: jenkins
2020-03-12arm: fix reg num for Monitor modeAntonio Borneo
Commit 2efb1f14f611 ("Add GDB remote target description support for ARM4") inserts two additional registers "sp" and "lr" in the table arm_core_regs[], thus shifting by two the position of the last three registers already present "sp_mon" moved from index 37 to 39 "lr_mon" moved from index 38 to 40 "spsr_mon" moved from index 39 to 41 Part of the code is updated (e.g. enum defining ARM_SPSR_MON and array arm_mon_indices[]), but it's missing the update of mapping in armv4_5_core_reg_map[]. Fix armv4_5_core_reg_map[]. Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 2efb1f14f611 ("Add GDB remote target description support for ARM4") Reviewed-on: http://openocd.zylin.com/5257 Tested-by: jenkins
2020-03-10semihosting: reorganize semihosting commandsTarek BOCHKATI
the same semihosting handlers chain is declared twice: 1. in src/target/armv4_5.c 2. in src/target/riscv/riscv.c to make it simpler we moved the declaration into 'src/target/semihosting_common.c' under semihosting_common_handlers[]. then we used this into both of armv4_5.c and riscv.c Change-Id: If813b3fd5eb2476658f1308f741c4e805141f617 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5473 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Liviu Ionescu <ilg@livius.net>
2019-12-19target/armv4_5: use c99 array designator to init arm_core_regs[]Antonio Borneo
During code analysis and development, counting again and again the lines to find the index of the register is a boring error-prone brain-damaging activity. Use the c99 syntax and add once forever the array designators to specify the index values. The code behavior is not changed. Change-Id: I2c70f70794475679efb91a8dfadc00f50715bd3f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5256 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14helper/command: change prototype of command_print/command_print_samelineAntonio Borneo
To prepare for handling TCL return values consistently, all calls to command_print/command_print_sameline should switch to CMD as first parameter. Change prototype of command_print() and command_print_sameline() to pass CMD instead of CMD_CTX. Since the first parameter is currently not used, the change can be done though scripts without manual coding. This patch is created using the command: sed -i PATTERN $(find src/ doc/ -type f) with all the following patters: 's/\(command_print(cmd\)->ctx,/\1,/' 's/\(command_print(CMD\)_CTX,/\1,/' 's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/' 's/\(command_print_sameline(cmd\)->ctx,/\1,/' 's/\(command_print_sameline(CMD\)_CTX,/\1,/' 's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/' This change is inspired by http://openocd.zylin.com/1815 from Paul Fertser but is now done through scripting. Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/5081 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-07target/armv4_5: use coherent syntax in struct initializationAntonio Borneo
While initializing struct command_registration, the field's name "name" is not specified, thus relying on the fact that it is the first field declared in the struct and it's initialization value can be listed as the first one. Be coherent in the struct initialization and always use the field's name. Change-Id: I9ef7ac08e7cd5b82a6a7896c47017943d668925f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5011 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2019-03-06target/armv4_5: Use 'bool' data typeMarc Schink
Change-Id: I82e3963ea662844bb96943aee849dab35ea96bb3 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4952 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-02-07target start_algorithm: Don't copy the IN mem_params fix uninitialised value.Jean-Christian de Rivaz
Fix the write only out params TODO on armv7m.c Fix conditional move depends on uninitialised value. It was detected while programming a LPC8Nxx with a FTDI adapter. valgrind --leak-check=full --show-leak-kinds=all --track-origins=yes [...] ==8696== Conditional jump or move depends on uninitialised value(s) ==8696== at 0x16E4D3: buf_set_u32 (binarybuffer.h:52) ==8696== by 0x16E4D3: ftdi_swd_queue_cmd (ftdi.c:1206) ==8696== by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271) ==8696== by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382) ==8696== by 0x18E33B: mem_ap_write (arm_adi_v5.c:420) ==8696== by 0x197CD9: target_write_buffer_default (target.c:2176) ==8696== by 0x2464B3: armv7m_start_algorithm (armv7m.c:383) ==8696== by 0x246AEB: armv7m_run_algorithm (armv7m.c:330) ==8696== by 0x19D846: target_run_algorithm (target.c:814) ==8696== by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818) ==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992) ==8696== by 0x185BDF: flash_driver_erase (core.c:44) ==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541) ==8696== by 0x18650D: flash_iterate_address_range (core.c:567) ==8696== by 0x18732F: flash_erase_address_range (core.c:584) ==8696== by 0x18732F: flash_write_unlock (core.c:928) ==8696== Uninitialised value was created by a heap allocation ==8696== at 0x4C2BBAF: malloc (vg_replace_malloc.c:299) ==8696== by 0x220EF9: init_mem_param (algorithm.c:30) ==8696== by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777) ==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992) ==8696== by 0x185BDF: flash_driver_erase (core.c:44) ==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541) ==8696== by 0x18650D: flash_iterate_address_range (core.c:567) ==8696== by 0x18732F: flash_erase_address_range (core.c:584) ==8696== by 0x18732F: flash_write_unlock (core.c:928) ==8696== by 0x18ACDF: handle_flash_write_image_command (tcl.c:457) ==8696== by 0x1B7D99: run_command (command.c:623) ==8696== by 0x1B7D99: script_command_run (command.c:208) ==8696== by 0x1B7FD9: command_unknown (command.c:1033) ==8696== by 0x2E2D37: JimInvokeCommand (jim.c:10364) ==8696== by 0x2E3865: Jim_EvalObj (jim.c:10814) ==8696== ==8696== Conditional jump or move depends on uninitialised value(s) ==8696== at 0x16E506: buf_set_u32 (binarybuffer.h:52) ==8696== by 0x16E506: ftdi_swd_queue_cmd (ftdi.c:1207) ==8696== by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271) ==8696== by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382) ==8696== by 0x18E33B: mem_ap_write (arm_adi_v5.c:420) ==8696== by 0x197CD9: target_write_buffer_default (target.c:2176) ==8696== by 0x2464B3: armv7m_start_algorithm (armv7m.c:383) ==8696== by 0x246AEB: armv7m_run_algorithm (armv7m.c:330) ==8696== by 0x19D846: target_run_algorithm (target.c:814) ==8696== by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818) ==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992) ==8696== by 0x185BDF: flash_driver_erase (core.c:44) ==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541) ==8696== by 0x18650D: flash_iterate_address_range (core.c:567) ==8696== by 0x18732F: flash_erase_address_range (core.c:584) ==8696== by 0x18732F: flash_write_unlock (core.c:928) ==8696== Uninitialised value was created by a heap allocation ==8696== at 0x4C2BBAF: malloc (vg_replace_malloc.c:299) ==8696== by 0x220EF9: init_mem_param (algorithm.c:30) ==8696== by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777) ==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992) ==8696== by 0x185BDF: flash_driver_erase (core.c:44) ==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541) ==8696== by 0x18650D: flash_iterate_address_range (core.c:567) ==8696== by 0x18732F: flash_erase_address_range (core.c:584) ==8696== by 0x18732F: flash_write_unlock (core.c:928) ==8696== by 0x18ACDF: handle_flash_write_image_command (tcl.c:457) ==8696== by 0x1B7D99: run_command (command.c:623) ==8696== by 0x1B7D99: script_command_run (command.c:208) ==8696== by 0x1B7FD9: command_unknown (command.c:1033) ==8696== by 0x2E2D37: JimInvokeCommand (jim.c:10364) ==8696== by 0x2E3865: Jim_EvalObj (jim.c:10814) Change-Id: I50f9a8c4516b686cf62ac3c76f47c53465e949da Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Reviewed-on: http://openocd.zylin.com/4811 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07target algo: do not write reg_param if direction is PARAM_INTomas Vanek
Without this change xxx_start_algorithm() writes all register parameters no matter of their direction. It usually results in writing of uninitialized reg_params[].value - possibly reported by valgrind. While on it fix the wrong parameter direction in kinetis_disable_wdog_algo(). This bug did not have any impact because of unconditional write of reg_params. Change-Id: Ia9c6a7b37f77d5eb6e5f5463012dddd50471742b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4813 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-27command: initialize the command mode for every commandAntonio Borneo
All the commands in OpenOCD have been inspected and have the command mode initialize, apart for two of them. This is not critical, because the uninitialized value (0) is equivalent to the enum COMMAND_EXEC, that is also the correct value for the two mentioned commands. To keep the code consistent, initialize the command mode to COMMAND_EXEC. Change-Id: Iaf043364cbd1005418d787ed045a3ec653612382 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4861 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-08target/arm: add support for multi-architecture gdbAntonio Borneo
GDB can be built for multi-architecture through the command ./configure --enable-targets=all && make Such multi-architecture GDB requires the target's architecture to be selected either manually by the user through the GDB command "set architecture" or automatically by the target description sent by the remote target (i.e. OpenOCD). Commit e65acd889c61a424c7bd72fdee5d6a3aee1d8504 ("gdb_server: add support for architecture element") already provides the required infrastructure to support multi-architecture gdb. arm-none-eabi-gdb 8.2 uses "arm" as default architecture, but also supports the following values: "arm_any", "armv2", "armv2a", "armv3", "armv3m", "armv4", "armv4t", "armv5", "armv5t", "armv5te", "armv5tej", "armv6", "armv6k", "armv6kz", "armv6-m", "armv6s-m", "armv6t2", "armv7", "armv7e-m", "armv8-a", "armv8-m.base", "armv8-m.main", "armv8-r", "ep9312", "iwmmxt", "iwmmxt2", "xscale". These values can be displayed on arm gdb prompt by typing "set architecture " followed by a TAB for autocompletion. Set the gdb architecture value for all arm targets to "arm". Change-Id: I176cb89878606e1febd546ce26543b3e7849500a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4754 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-07-18Avoid null target->semihosting references.Liviu Ionescu
The new common semihosting code introduced a bug, in certain conditions target->semihosting was used without semihosting being initialised. The solution was to explicitly test for target->semihosting before dereferencing it. Change-Id: I4c83e596140c68fe4ab32e586e51f7e981a40798 Signed-off-by: Liviu Ionescu <ilg@livius.net> Reviewed-on: http://openocd.zylin.com/4603 Tested-by: jenkins Reviewed-by: Jonathan Larmour <jifl@eCosCentric.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-04Rework/update ARM semihostingLiviu Ionescu
In 2016, ARM released the second edition of the semihosting specs ("Semihosting for AArch32 and AArch64"), adding support for 64-bits. To ease the reuse of the semihosting logic for other platforms (like RISC-V), the semihosting code was isolated from the ARM target and updated to the latest specs. The new code is already in use since January (in GNU MCU Eclipse OpenOCD) and no problems were reported, neither for ARM nor for RISC-V targets, after more than 7K downloads. The 2 new files were formatted with uncrustify. Change-Id: Ie84dbd86a547323bb8a5d24eab68fc7dad013d96 Signed-off-by: Liviu Ionescu <ilg@livius.net> Reviewed-on: http://openocd.zylin.com/4518 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-10target, flash: prepare infrastructure for multi-block blank checkTomas Vanek
'flash erase_check' command runs a check algorithm on a target if possible. The algorithm is run repeatedly for each flash sector. Unfortunately every start and stop of the algorithm impose not negligible overhead. In practice it means checking is faster than plain read only for sectors of size approx 4 kByte or bigger. And checking sectors as short as 512 bytes runs approx 4 times slower than plain read. The patch changes API call target_blank_check_memory() and related to take an array of sectors (or arbitrary memory blocks). Changes in target-specific checking routines are kept minimal. They use only the first block from the array and process it by the unchanged algorithm. default_flash_blank_check() routine repeats target_blank_check_memory() until all blocks are checked, so it works with both multi-block and single-block based checkers. Change-Id: I0e6c60f2d71364c9c07c09416b04de9268807f5e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4297 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-03-10Support for Arm VFP v3 registers read/writeOmair Javaid
This patch adds support in openOCD to read/write Arm vector/floating point registers. This is compatible with Arm vfp v3 target xml in GDB. Please refer to binutils-gdb/gdb/features/arm/arm-vfpv3.xml Change-Id: Id4dd1bddef51c558f1a86300c1a876d159463f18 Signed-off-by: Omair Javaid <omair.javaid@linaro.org> Reviewed-on: http://openocd.zylin.com/4421 Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Tested-by: jenkins
2017-10-22arm: semihosting: set command line argumentsAndreas Fritiofson
Add "arm semihosting_cmdline [argv0 argv1 ...]" for setting the command line arguments for the debuggee. [andreas.fritiofson@gmail.com]: Dynamic allocation, empty default Change-Id: I831ddd161d602f251940e29608a154e9590fdee1 Signed-off-by: Christian Groessler <chris@groessler.org> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3106 Tested-by: jenkins
2017-02-10target: Add 64-bit target address supportDongxue Zhang
Define a target_addr_t type to support 32-bit and 64-bit addresses at the same time. Also define matching TARGET_PRI*ADDR format macros as well as a convenient TARGET_ADDR_FMT. In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000) be least invasive by leaving the formatting unchanged apart from the type; for generic code adopt TARGET_ADDR_FMT as unified address format. Don't silently change gdb formatting here, leave that to later. Add COMMAND_PARSE_ADDRESS() macro to abstract the address type. Implement it using its own parse_target_addr() function, in the hopes of catching pointer type mismatches better. Add '--disable-target64' configure option to revert to previous 32-bit target address behavior. Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5 Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Signed-off-by: David Ung <david.ung.42@gmail.com> [AF: Default to enabling (Paul Fertser), rename macros, simplify] Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2016-12-08semihosting: support fileio operationSteven Stallion
This patch adds support for bridging semihosting to GDB's File-I/O remote protocol extension. For the most part operations match up 1:1, however some require a working area to complete successfully, namely operations that devolve to read, stat, and gettimeofday. A new command was added to enable support for fileio named `arm semihosting_fileio`, which ensures that the default behavior remains intact for those that prefer it. Finally, redundant logging was removed from the target_arch_state function; this permits ARM targets to quiesce log output when polling for a fileio reply. This prevents filling the logs with halt/resume messages when using semihosting fileio. Change-Id: Ifbb864fc2373336a501cc0332675b887b552e1ee Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/3566 Tested-by: jenkins Reviewed-by: Steven Stallion <sstallion@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-10-30flash/nor: Add erased_value to drivers and pass it to targetsAndreas Färber
struct flash_driver has a default_padded_value field that is similar, but it can be changed by the user for the specific purpose of padding. Add a new erased_value field and initialize it for all targets, particularly stm32lx, xmc4xxx and virtual. Use this value in core.c:default_flash_mem_blank_check(), the slow path. Extend the target API to pass erased_value down to target code. Adding an argument ensures that we catch all callers. This allows us to merge xmc4xxx.c:xmc4xxx_blank_check_memory() into armv7m:armv7m_blank_check_memory(). It further allows us to use default_flash_blank_check() in place of xmc4xxx.c:xmc4xxx_flash_blank_check(), adding a potential slow path fallback, as well as stm32lx:stm32lx_erase_check(), adding the potential armv7m fast path with fallback to default_flash_mem_blank_check(). Fix a mips32 code comment while at it (zeroed -> erased). The armv4_5 and mips32 target implementations will now error out if an erase value other than 0xff is used, causing default_flash_blank_check() to fall back to the default_flank_mem_blank_check() slow path. Change-Id: I39323fbbc4b71c256cd567e439896d0245d4745f Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3497 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-05-24Remove FSF address from GPL noticesMarc Schink
Also make GPL notices consistent according to: https://www.gnu.org/licenses/gpl-howto.html Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3488 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv4_5: Integrate build of checksum codeAndreas Färber
Add rules to build armv4_5_crc.inc, and convert the code to target endianness the least intrusive way. Change-Id: I7452b2c7e679dae14f9cda5f89bc81c16fc12cad Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3473 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-05-22armv4_5: Integrate build of erase check codeAndreas Färber
Add rules to build armv4_5_erase_check.inc, and convert the code to target endianness the least intrusive way. Drop an unused word from the assembler sources to make the ARM bytecode fully match that of armv4_5.c and to not break ARMv4 assumptions. This completes the build rules for contrib/loaders/erase_check directory. Change-Id: I36be7a944e26142088195fa3fb072d4e577bf328 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3135 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv4_5: Improve arm_checksum_memory() error handlingAndreas Färber
Clean up the working area in case writing fails. Change the error handling paradigm to avoid duplication. Change-Id: Ie3f95f992a98a1325428e4032a1c17346d4c9977 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3472 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv4_5: Improve arm_blank_check_memory() error handlingAndreas Färber
Clean up the working area in case writing fails. Change the error handling paradigm to avoid duplication. Change-Id: I95bb12fbe7c80b594e178468bcd4f6387c682c93 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3471 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-02-29armv4_5: support weirdo ARMv6 secure monitor modeLinus Walleij
On the ARM PB1176JZF-S the system comes up in secure monitor mode after reset. However the modebits in CPSR form the value 28 (0x1c) and CPSR is 0x800001dc deeming it UNRECOGNIZED. Define this mode to be synonymous to mode 22 (MON) and things start to work like a charm. Change-Id: I001f7773ee1076202c0c633e466d2d833f7a1413 Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-on: http://openocd.zylin.com/3196 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-03-09armv7m: add FPU registers supportPaul Fertser
This patch adds the fpv4-sp-d16 registers to the armv7m register set. The work is inspired by Mathias K but takes a different approach: instead of having both double and single presicion registers in the cache this patch works only with the doubles and counts on GDB to split the data in halves whenever needed. Tested with HLA only (on an STM32F334 disco board). Currently this patch makes all ARMv7-M targets report an FPU-enabled target description to GDB. It shouldn't harm if the user is not trying to access non-existing FPU. However, the plan is to make this depend on actual FPU presence later. Change-Id: Ifcc72c80ef745230c42e4dc3995f792753fc4e7a Signed-off-by: Mathias K <kesmtp@freenet.de> [fercerpav@gmail.com: rework to fit target description framework] Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/514 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-30armv4_5: Continue the change from uint32_t to uint8_t[4] for regsAndreas Fritiofson
Also remove an unrelated no-op cast. Change-Id: Ibeb6c72e5b0b0347abb568947a05a179661faf2d Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2473 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins
2014-01-23Add GDB remote target description support for ARM4Luca BRUNO
This commit adds support for passing the ARM4 target description to GDB when enabling gdb_target_description, in order to expose all banked registers. Change-Id: Id618bc6226f00fe83397ea28888a84b64b09cafd Signed-off-by: Luca BRUNO <lucab@debian.org> Reviewed-on: http://openocd.zylin.com/1810 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07gdb_server: support gdb target descriptionHsiangkai Wang
* Add a parameter in .get_gdb_reg_list() to return different register lists as generating target description. * Modify STRUCT REG to let gdb generate target description according to register information. The modified structure of register is struct reg { const char *name; uint32_t number; /* for regnum="num" */ struct reg_feature *feature; /* for register group feature name */ bool caller_save; /* for save-restore="yes|no" */ void *value; bool dirty; bool valid; bool exist; uint32_t size; struct reg_data_type *reg_data_type; /* for type="type" */ const char *group; /* for group="general|float|vector" */ void *arch_info; const struct reg_arch_type *type; }; Change-Id: I2096b67adf94518ba0b8b23d8c6a9f64ad7932b8 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1382 Tested-by: jenkins Reviewed-by: Franck Jullien <franck.jullien@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-07-01armv4_5: prevent segfault when gdb connects to an underinitialised targetPaul Fertser
This prevents segmentation fault that can occur on cortex_a targets if gdb connection is established before it's halted and CPSR examined. Change-Id: Id996200e0fd95440496509c1fecaabbdbf425e23 Tested-by: Henrik Nordstrom <hno@squid-cache.org> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1446 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05update files to correct FSF addressSpencer Oliver
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-02-02armv7m: use generic arm::core_modeSpencer Oliver
To simplify things change over to using the generic core_mode struct rather than maintaining a armv7m specific one. Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/966 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-11-06ARM v4/v5 target files: mrc and mcr help information is incorrect.Karl Kurbjun
The order of the mrc/mcr command matches the ARM Architecture Reference Manual. This patch corrects the help information for mrc/mcr. Change-Id: I1f0e6a628a3644124591a6aa291b8a58cfd93b44 Signed-off-by: Karl Kurbjun <kkurbjun@gmail.com> Reviewed-on: http://openocd.zylin.com/914 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-05-14build: use generic name for arm_algorithm varsSpencer Oliver
This makes the code a bit easier to read as arm_algorithm can refer to other arch's, not just armv4_5. Change-Id: I78c99d40f34cda04e06f2daee75b48ff40a1d23d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/613 Tested-by: jenkins Reviewed-by: Aurelien Jacobs <aurel@gnuage.org> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-14build: add missing erase_check loader srcSpencer Oliver
Change-Id: I1534c1ea1606fda9eb6ffa6a11a708f8c8a3d46a Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/605 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-02-06build: cleanup src/target directorySpencer Oliver
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-01-23cleanup: rename armv4_5 to arm for readabilitySpencer Oliver
Nothing more than a name change, just to make reading the code a bit simpler. Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/390 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-18cmd: add missing usage varsSpencer Oliver
we should have caught them all - hopefully. Change-Id: I35435317fccaf5ad0216244d69f76db6857bb582 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/381 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-12target: fix missing semihosting return pathSpencer Oliver
bug nicely caught by clang. Change-Id: I7abf0fdd76666fb3eb1c83e3edfd01e0da485ffe Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/359 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-04Change return value on error.Mathias K
On wrong parameters a error is signalized to the calling function. Change-Id: I484443fdb39938e20382edc9246d5ec546a5c960 Signed-off-by: Mathias K <kesmtp@freenet.de> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/282 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-04retire ERROR_INVALID_ARGUMENTS and replace with ERROR_COMMAND_SYNTAX_ERRORØyvind Harboe
Change-Id: I6dee51e1fab1944085391f274a343cdb9014c7a4 Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/300 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-01target: fix null pointer exceptionØyvind Harboe
check if no target is selected and return error. Change-Id: Ie8abb63c708d09572b45e88fc6766af108715077 Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/148 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-06-04Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixesFreddie Chopin
2010-10-28src: add loader src descriptionSpencer Oliver
- add comment where to find the various loaders src files. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-08-11arm: add missing error reportingØyvind Harboe
when an unknown core mode is read from the target, report error. Can be communication failure. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-20armv4_5: add algorithms instruction breakpoint supportSpencer Oliver
Update the arm_checksum_memory and arm_blank_check_memory algorithms to use a breakpoint instruction on v5 arch. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-05command context: fix errors when running certain commands on startupØyvind Harboe
Various commands, e.g. "arm mcr xxxx" would fail if invoked upon startup since it there was no command context defined for the jim interpreter in that case. A Jim interpreter is now associated with a command context(telnet, gdb server's) or the default global command context. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-10ARMV4_5: review scope of dataAntonio Borneo
Add "static" qualifier to private data. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
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