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path: root/src/target/arm_dpm.h
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2013-06-05update files to correct FSF addressSpencer Oliver
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-03-15cortex_a : optimize apb read/write access.Evan Hunter
Rewrite: Adheres more closely to 'fast read/write' examples in TRM. up to 50x faster Change-Id: Ieb4da57d8367628f3e7306827a5b1f0ab550e641 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/903 Tested-by: jenkins Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-06build: cleanup src/target directorySpencer Oliver
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2011-09-30armv7a ,cortex a : add L1, L2 cache support, va to pa supportMichel Jaouen
2011-01-31arm_dpm: add some SCR/RCR macrosAaron Carroll
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2010-12-29Compilation Warnings on OS X 10.5Andrew MacIsaac
I received a number of "-Wshadow" related warnings (treated as errors) while trying to build on OS X Leopard. In addition, there were two miscellaneous other warnings in the flash drivers. Attached are two patches which correct these issues and the commit messages to accompany them. My system has the following configuration (taken from uname -a): Darwin 9.8.0 Darwin Kernel Version 9.8.0: Wed Jul 15 16:55:01 PDT 2009; root:xnu-1228.15.4~1/RELEASE_I386 i386 === Werror_patch.txt Commit Message === compilation: fixes for -Wshadow warnings on OS X These changes fix -Wshadow compilation warnings on OS X 10.5.8 Compiled with the following configure command: ../configure --prefix=/usr/local --enable-maintainer-mode --enable-jlink --enable-ft2232_libftdi === flash_patch.txt Commit Message === compilation: fixes for flash driver warnings on OS X These changes fix two compilation warnings on OS X 10.5.8: ../../../../src/flash/nor/at91sam3.c:2767: warning: redundant redeclaration of 'at91sam3_flash' ../../../../src/flash/nor/at91sam3.c:101: warning: previous declaration of 'at91sam3_flash' was here and ../../../../src/flash/nor/stmsmi.c:205: warning: format not a string literal and no format arguments Compiled with the following configure command: ../configure --prefix=/usr/local --enable-maintainer-mode --enable-jlink --enable-ft2232_libftdi === Andrew
2009-12-11ARM DPM: support updating HW breakpointsDavid Brownell
Abstract the DPM breakpoint and watchpoint data structures to have a shared core for housekeeping. Abstract the code updating the watchpoint registers so that it can be used to update breakpoint registers. Then do so, when something has set up the breakpoint state used by this code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03ARM DPM: share debug reason logicDavid Brownell
No point in both ARM11 and Cortex-A8 having private copies of the logic sorting out e.g. DBG_REASON_WATCHPOINT. Add and use a shared routine for this ... there's actually a bunch more debug entry logic that could be shared, this is just a start on that. Note that this routine fixes a bug observed in the ARM11 code, where some abort mode quirks were displayed as being an unknown debug reason; and also silences needless ARM11 chatter. Likewise with private copies of DSCR ... add one to the DPM struct. Save it as part of setting DBG_REASON_* so later patches can switch over to using that copy. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03ARM11: use shared DSCR bit namesDavid Brownell
For the bits now defined in "arm_dpm.h", switch to the shared DSCR_* symbol and remove the ARM11_DSCR_* version. Define DSCR_INT_DIS and use it instead of the ARM11_DSCR_* sibling symbol. (Note: for both ARM11 and Cortex-A8, this should arguably be enabled by default when single stepping.) Remove some other unused declarations in "arm11.h". Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03ARM DPM: make DSCR bit defs sharableDavid Brownell
Move the symbols for these bits from "armv7a.h" to "arm_dpm.h", where they can be seen and used not just by Cortex-A but also by the ARM11 (armv6) code. Change them from bit numbers to bit masks ... this matches the usage in ARM11 code, and also makes it easier to read. Rename DSCR_EXT_INT_EN as DSCR_ITR_EN to match the docs; it's enabling ITR functionality, not external interrupts, so this changes the name to be less misleading. (There *IS* a bit affecting interrupts, and this isn't it.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-02ARM DPM: tweak initializationDavid Brownell
Move the initial breakpoint/watchpoint disable calls to arm_dpm_initialize(), and start using that routine. This split helps with arm11 support.
2009-12-02ARMv7a/Cortex-A8: report watchpoint trigger insnDavid Brownell
Save and display the address of the instruction which triggered the watchpoint. Because of pipelining, that's well behind the PC value when debug entry completes. (Example in a subroutine that had been returned from...) Remove unused A8 stuff, mostly watchpoint hooks from the header. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01ARM: core DPM support for watchpointsDavid Brownell
This is a NOP unless the underlying core exposes two new methods, and neither of the two cores using this (ARM11xx, Cortex-A8) do so yet. This patch only updates those cores so they pass a flag saying whether or not to update breakpoint and watchpoint status before resuming; and removing some now-needless anti-segfault code from ARM11. Cortex-A8 didn't have that code ... yes, it segfaulted when setting watchpoints. NOTE: this uses a slightly different strategy for setting/clearing breakpoints than the ARM7/ARM9/etc code uses. It leaves them alone unless it's *got* to change something, to speed halt/resume cycles (including single stepping). ALSO NOTE: this under-delivers for Cortex-A8, where regions with size up to 2 GBytes can be watched ... it handles watchpoints which ARM11 can also handle (size 1/2/4 bytes). Should get fixed later. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-24Cortex-A8: implement DPMDavid Brownell
This implements the DPM interface for Cortex-A8 cores. It also adds a synchronization operation to the DPM framework, which is needed by the Cortex-A8 after CPSR writes. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-24ARM: new DPM interfaceDavid Brownell
First version of interface for sharing code between ARMv6 and ARMv7a debug modules ... now the architecture includes debug support. (Not the same as for the trimmed-down v7m or v6m though!) This is a first version of an interface that will let the ARM11 and Cortex-A8 support share code, features, and bugfixes. Based on existing code from both of those cores. The ARM v7-AR architecture specification calls this commonality the "Debug Programmer's Model (DPM)", which seemed to be an appropriate acronym -- a TLA even! -- for use in our code. Made it so. :) The initial scope of this just supports register access, and is geared towards supporting top level "struct arm" mechanisms. Later, things like breakpoint and watchpoint support should be included. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>