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2016-07-19Fix usage of timeval_ms()Andreas Färber
First, fix the timeval_ms() implementation to not have K&R but ANSI argument semantics by adding a missing void. timeval_ms() returns an int64_t, not uint64_t or long long. Consistently use int64_t for variables and PRI*64 as format string. While at it, change a few related variables to bool for clarity. Note that timeval_ms() may return a negative error code, but not a single caller checks for that. Change-Id: I27cf83e75b3e9a8913f6c43e98a281bea77aac13 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3499 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-05-24Remove FSF address from GPL noticesMarc Schink
Also make GPL notices consistent according to: https://www.gnu.org/licenses/gpl-howto.html Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3488 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-12-29target/arm: Remove usage of struct arm_jtag in ARMv7 targetsAndreas Fritiofson
The Cortex-A and Cortex-M keeps an arm_jtag struct around just to be able to pass a pointer to it to one common JTAG function which anyway only uses the TAP field. Refactor the function to take a TAP directly, remove the legacy struct from cortex instances and store the TAP pointer only in the DAP. Cortex-M makes a call to arm_jtag_setup_connection() with the struct but the function does nothing useful for a Cortex-M target so remove the call. Change-Id: I3b33709ef55372ef14522ed4337e9f2e817ae3ab Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3142 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2014-01-24arm920t: fix write memory operations with caches enabledPaul Fertser
Commit ff5ec942d80a34e20b5a3ca3328f7e6a55fb309b made this target always use generic arm7_9 memory write routines for software breakpoints which resulted in inability to debug and single-step sources in Gdb when icache is active as generic routine doesn't invalidate it. This should fix it (and is real-life tested against Samsung S3C2442). I expect other arm7-9 targets to be affected as well. Change-Id: Id7980e370ae4db47ac6b1490321d81ffe85711c0 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1817 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-10-15arm7_9: Avoid infinite loops in bulk write dispatchingAndreas Fritiofson
Add a mandatory field in struct arm7_9_common for regular, non-optimized memory writes. Together with the existing bulk_memory_write field, this allows variants to select any combination of implementations for regular and bulk writes, without risking infinite loops from accidentally using bulk writes for implementing bulk writes. ARM 7/9 targets may now select arm7_9_memory_write_opt as their target.write_memory implementation, which will dispatch to arm7_9_common.bulk_write_memory if possible, or fallback to arm7_9_common.write_memory otherwise. To avoid loops, bulk write implementations mustn't call any other functions than arm7_9_write_memory_no_opt() to write memory; it will unconditionally call arm7_9_common.write_memory. If they fail, they should simply return error to allow the caller to fallback to regular writes. Tested on a regular ARM7TDMI only. Change-Id: Iae42a6e093e2df68c4823c927d757ae8f42ef388 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1685 Tested-by: jenkins Reviewed-by: Sergey A. Borshch <sb-sf@users.sourceforge.net> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-13[RFC] target: Move bulk_write_memory to arm7_9Andreas Fritiofson
The only remaining user is arm7_9 so remove it from the target API and add it to struct arm7_9_common to support all its variants with minimal changes. Many of the variants are likely not correct in the cache/mmu handling when the bulk write is triggered. This patch does nothing to change that, except for arm946e, where it was easier to do what might be the right thing. Change-Id: Ie73ac07507ff0936fefdb90760046cc8810ed182 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1220 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05update files to correct FSF addressSpencer Oliver
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2012-02-06build: cleanup src/target directorySpencer Oliver
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-01-23cleanup: rename armv4_5 to arm for readabilitySpencer Oliver
Nothing more than a name change, just to make reading the code a bit simpler. Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/390 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-18cmd: add missing usage varsSpencer Oliver
we should have caught them all - hopefully. Change-Id: I35435317fccaf5ad0216244d69f76db6857bb582 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/381 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-04Change return value on error.Mathias K
On wrong parameters a error is signalized to the calling function. Change-Id: I484443fdb39938e20382edc9246d5ec546a5c960 Signed-off-by: Mathias K <kesmtp@freenet.de> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/282 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-06-04Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixesFreddie Chopin
2011-04-01types: write memory now uses constØyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11arm: add missing error reportingØyvind Harboe
when an unknown core mode is read from the target, report error. Can be communication failure. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-20arm_jtag_scann error propagation fixesØyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19arm: error propagation of arm_jtag_set_instrØyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19debug: debug entry error propagationØyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19arm: add error propagation for enable/disable mmu cachesØyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19arm: add error propagation to generic get_ttb fnØyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15arm920t: -Wshadow warning fixesØyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-12TARGET: removed unused parametersAntonio Borneo
Parameters "domain" and "ap" of function armv4_5_mmu_translate_va() are not used. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12TARGET: removed unsed parameterAntonio Borneo
Parameter "type" of function armv4_5_mmu_translate_va() is now not used. Remove the parameter and the "enum" listing its values. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12TARGET: fix handling return code of MMU translationAntonio Borneo
Function armv4_5_mmu_translate_va() now properly signals errors in the return value. Remove former error handling by setting variable "type" to value "-1". Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12TARGET/ARM920T: fix return valueAntonio Borneo
Function arm920t_write_memory() default return value should be ERROR_OK. All cases of local errors are handled immediately and not further propagated. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12TARGET/ARM920T: fix compile warningAntonio Borneo
Commit 0538081246fafbfb74d554bb1b758412534aa254 introduces a compile time warning: arm920t.c: In function ‘arm920t_write_memory’: arm920t.c:567: warning: ‘retval’ may be used uninitialized in this function Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-11arm mmu: error propagation added for address translationØyvind Harboe
The return value for MMU translation was a mess, either error or value. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-10ARM920T: review scope of functionsAntonio Borneo
Add "static" qualifier to private functions. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-21arm breakpoints: amended fix commentØyvind Harboe
the handling of caches, should be moved into the breakpoint specific callbacks rather than being plonked into generic memory write fn's. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-19jtag: retire jtag_get/set_end_state()Øyvind Harboe
Voila! This get rids of mysteries about what what state the TAP is in. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-18jtag: retire one instance of jtag_get_end_state() usageØyvind Harboe
Less global variables.... Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-18jtag: cut down on usage of unintended modification of global end stateØyvind Harboe
jtag_get/set_end_state() is now deprecated. There were lots of places in the code where the end state was unintentionally modified. The big Q is whether there were any places where the intention was to modify the end state. 0.5 is a long way off, so we'll get a fair amount of testing. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-08jtag: retire tap fieldØyvind Harboe
jtag_add_dr/ir_scan() now takes the tap as the first argument, rather than for each of the fields passed in. The code never exercised the path where there was more than one tap being scanned, who knows if it even worked. This simplifies the implementation and reduces clutter in the calling code. use jtag_add_ir/dr_plain_scan() for more fancy situations. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-21ARM: keep a handle to the PCDavid Brownell
Keep a handle to the PC in "struct arm", and use it. This register is used a fair amount, so this is a net minor code shrink (other than some line length fixes), but mostly it's to make things more readable. For XScale, fix a dodgy sequence while stepping. It was initializing a variable to a non-NULL value, then updating it to handle the step-over-active-breakpoint case, and then later testing for non-NULL to see if it should reverse that step-over-active logic. It should have done like ARM7/ARM9 does: init to NULL. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-20arm920t line length cleanupDavid Brownell
The recent patch to fixbreakpoints and dcache handling added a bunch of overlong lines (80+ chars) ... shrink them, and do the same to a few lines which were already overlong. Also add a few FIXME comments to nudge (a) replacement of some magic numbers with opcode macros, which will be much better at showing what's actually going on, and (b) correct return codes. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-19atm920t : fix breakpoints and data cache handlingMarc Pignat
Breakpoints did not work because the data cache was not flushed properly. As a bonus add capability to write to memory marked as read only by the MMU, which allows software breakpoints in such memory regions.
2010-02-16ARM920T scanchain 15 comments/cleanupDavid Brownell
For folk who don't know the ARM920 JTAG interface very well, the two modes of scan chain 15 access to CP15 are confusing. Make those parts of the ARM920 code less opaque, by: - Adding comments referencing the relevant parts of the TRM, catching up to similar updates in the User's Guide. - Replacing magic numbers in physical access clients with symbolic equivalents. No functional change. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-12arm920: add virt2phys fnMarc Pignat
Copy of the 926ejs function. I have tested it only using my rtems application (where virtual address mapping == physical). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-13arm7/9: enable check that DCC downloads have been enabledØyvind Harboe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-07ARM720: help/usage updatesDavid Brownell
Deprecate the "pass an instruction opcode" flavor of cp15 access in favor of the "arm mcr ..." and "arm mrc ..." commands, which offer fewer ways to break things. Use the same EBNF syntax in the code as for the user's guide. Update User's Guide to say where to find those magic values (which table in the ARM920 TRM). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07ARM: don't clone arm_arch_state() codeDavid Brownell
Have various ARM cores delegate to arm_arch_state() to display basic information, instead of duplicating that logic. This shrinks the code, makes them all report when semihosting is active, and highlights which data are specific to this core. (Like ARM720 not having separate instruction and data caches.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07ARM: rename some generic routinesDavid Brownell
Rename some (mostly) generic ARM functions: armv4_5_arch_state() --> arm_arch_state() armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list() armv4_5_init_arch_info() --> arm_init_arch_info() Cores using the microcontroller profile may want a different arch_state() routine though. (Also fix strange indentation in arm_arch_state: use tabs only! And update a call to it, removing assignment-in-conditional.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07ARM: move opcode macros to <target/arm_opcodes.h>David Brownell
Move the ARM opcode macros from <target/armv4_5.h>, and a few Thumb2 ones from <target/armv7m.h>, to more appropriate homes in a new <target/arm_opcodes.h> file. Removed duplicate opcodes from that v7m/Thumb2 set. Protected a few macro argument references by adding missing parentheses. Tightening up some of the line lengths turned up a curious artifact: the macros for the Thumb opcodes are all 32 bits wide, not 16 bits. There's currently no explanation for why it's done that way... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07ARM: remove mrc_opcode(), use MRC() or MCR()David Brownell
Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where arm*20t should have used it, ARMV4_5_MCR() instead. Basically, *writing* coprocessor registers shouldn't have used the *read* opcode ... and both should stick to standard opcode constructors, not rearranging parameter sequence any more than already needed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04ARM: switch target_to_armv4_5() to target_to_arm()David Brownell
And remove that old symbol. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04ARM: rename armv4_5_state_* as arm_state_*David Brownell
And make arm_state_strings[] be const. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03change #include "time_support.h" to <helper/time_support.h>Zachary T Welch
Changes from the flat namespace to heirarchical one. Instead of writing: #include "time_support.h" the following form should be used. #include <helper/time_support.h> The exception is from .c files in the same directory.
2009-12-01target: "mcr" and "mrc" are ARM-specificDavid Brownell
Switch "mrc" and "mcr" commands to be toplevel ARM operations, as they should initially have been. Correct the usage message for both commands: it matches ARM documentation (as one wants!) instead of reordering them to match the funky mrc() and mcr() method usage (sigh). For Cortex-A8: restore a line that got accidentally dropped, so the secure monitor mode shadow registers will show again. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-24remove target_type register_command callbackZachary T Welch
Uses chaining of command_registration structures to eliminate all target_type register_callback routines. Exports the command_handler registration arrays for those target types that are used by others.
2009-11-24arm920t: use register_commands()Zachary T Welch
2009-11-24use COMMAND_REGISTER macroZachary T Welch
Replaces direct calls to register_command() with a macro, to allow its parameters to be changed and callers updated in phases.
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