| Age | Commit message (Collapse) | Author |
|---|
|
And make arm_state_strings[] be const.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "time_support.h"
the following form should be used.
#include <helper/time_support.h>
The exception is from .c files in the same directory.
|
|
Switch "mrc" and "mcr" commands to be toplevel ARM operations,
as they should initially have been.
Correct the usage message for both commands: it matches ARM
documentation (as one wants!) instead of reordering them to
match the funky mrc() and mcr() method usage (sigh).
For Cortex-A8: restore a line that got accidentally dropped,
so the secure monitor mode shadow registers will show again.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Uses chaining of command_registration structures to eliminate all
target_type register_callback routines. Exports the command_handler
registration arrays for those target types that are used by others.
|
|
|
|
Replaces direct calls to register_command() with a macro, to allow
its parameters to be changed and callers updated in phases.
|
|
Start using the arm_reg_current() call. This shrinks and speeds
the affected code. It can also prevent some coredumps coming from
invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns
bogus registers if e.g. "Secure Monitor" mode isn't supported by
the current CPU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Finish migrating from the old symbol to the new one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Have arm_set_cpsr() handle the two core state flags, updating
the CPU state. This eliminates code in various debug_entry()
paths, and marginally improves handling of the J bit.
Catch and comment a few holes in the handling of the J bit on
ARM926ejs cores ... it's unlikely our users will care about
Jazelle mode, but we can at least warn of Impending Doom. If
anyone does use it, these breadcrumbs may help them to find
the right path through the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Define arm_reg_current() ... returning handle to a given register,
and encapsulating the current mode's register shadowing. It's got
one current use, for reporting the current register set to GDB.
This will let later patches clean up much ARMV4_5_CORE_REG_MODE()
nastiness, saving a bit of code.
Define and use arm_set_cpsr() ... initially it updates the cached
CPSR and sets up state used by arm_reg_current(), plus any SPSR
handle. (Later: can also set up for T and J bits.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Stash a pointer to the CPSR in the "struct arm", to help get rid
of the (common) references to its index in the register cache.
This removes almost all references to CPSR offsets outside of the
toplevel ARM code ... except a pair related to the current ARM11
"simulator" logic (which should be removable soonish).
This is a net minor code shrink of a few hundred bytes of object
code, and also makes the code more readable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Add a new is_arm_mode() predicate, and use it to replace almost
all calls to current armv4_5_mode_to_number().
Eventually those internal mode numbers should vanish... along
with their siblings in the armv7a.c file.
Remove a handful of superfluous checks ... e.g. the mode number
was just initialized, or (debug entry methods) already validated.
Move one of the macros using internal mode numbers into the only
file which uses that macro. Make the tables manipulated with
those numbers be read-only and, where possible, static so they're
not confused with part of the generic ARM interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
|
|
This patch converts all instances of 'args' in COMMAND_HANDLER routines
to use CMD_ARGV macro.
|
|
This patch converts all instances of 'argc' in COMMAND_HANDLER routines
to use CMD_ARGC.
|
|
And move the rest of the vector_catch stuff into the C file;
it's not part of the module interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Same deal: "register.h" got needlessly included all over the
place because of being in a few widely included headers.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also, don't need that extra "types.h" inclusion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
The arm7_9_checksum_memory() and arm7_9_blank_check_memory()
routines are not actually specific to the ARM7 and ARM9 core
generations ... they can work for any core which can run
algorithms using basic ARM (not Thumb) instructions.
Rename them; move the declarations to a more generic site;
likewise move the code (and tidy it a bit in the process).
NOTE: the blank_check() method falsely returned a success
status (0) on one error path, when the algorithm failed.
Fixed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
No point in having two identical examine methods for the
ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share.
Add a bit of doxygen; stop needlessly exporting a method.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Remove misleading typedef and redundant suffix from struct command.
|
|
Remove misleading typedef and redundant suffix from struct command_context.
|
|
Remove misleading typedef and redundant suffix from struct target.
|
|
Remove misleading typedef and redundant suffix from struct reg.
|
|
Remove misleading typedef and redundant suffix from struct target_type.
|
|
Remove misleading typedef and redundant suffix from struct arm_jtag.
|
|
Remove misleading typedef and redundant suffix from struct arm9tdmi_common.
|
|
Remove misleading typedef and redundant suffix from struct arm920t_tlb_entry.
|
|
Remove misleading typedef and redundant suffix from struct arm920t_cache_line.
|
|
Remove misleading typedef and redundant suffix from struct arm7_9_common.
|
|
Remove misleading typedef and redundant suffix from struct arm920t_common.
|
|
Remove useless structure typedef.
|
|
Search and destroy the jtag_tap_t typedef. This also cleans up a
layering violation, removing the declaration from types.h.
|
|
By introducing the CMD_NAME macro, this parameter may be integrated
as args[-1] in command.[ch], without touching any other call sites.
|
|
|
|
mmu() works; virt2phys() fails and logs an error.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Use target_to_arm920(), replacing needless pointer traversals
and simplifying. Stop setting arm9tdmi->arch_info for arm920
type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
Unneeded exports cause confusion about the module interfaces.
Make most functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
This saved almost 900 bytes of code on x86_32; it seems the
compiler can leverage its knowledge that these functions are
not called from the outside world...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
|
|
The arm920t has a concept of read modify write cycles
that may have to be represented in the mrcmcr interface
eventually.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
To support breakpoints, flush data cache line and invalidate
instruction cache when 4 and 2 byte words are written.
The previous code was trying to write directly to the physical
memory, which was buggy and had a number of other situations
that were not handled.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
commands and target read/write physical memory callbacks.
|
|
|
|
This is done in a polymorphic implementation in target.c
|
|
- Replace '([ \t]*' with '('.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2376 b42882b7-edfa-0310-969c-e2dbd0fdcd60
|
|
- Replace ')\([<>]\)(' with ') \1 ('.
- Replace ')\([<>]\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\([<>]\)(' with '\1 \2 ('.
- Replace '\(\w\)\([<>]\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2375 b42882b7-edfa-0310-969c-e2dbd0fdcd60
|
|
- Replace ')\(=\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(=\)(' with '\1 \2 ('.
- Replace '\(\w\)\(=\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2372 b42882b7-edfa-0310-969c-e2dbd0fdcd60
|
|
- Replace ')\(>=\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(>=\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2367 b42882b7-edfa-0310-969c-e2dbd0fdcd60
|
|
git-svn-id: svn://svn.berlios.de/openocd/trunk@2303 b42882b7-edfa-0310-969c-e2dbd0fdcd60
|
