Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-11-30 | jtag newtap change & huge manual update | duane | |
git-svn-id: svn://svn.berlios.de/openocd/trunk@1194 b42882b7-edfa-0310-969c-e2dbd0fdcd60 | |||
2006-11-22 | - added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. ↵ | drath | |
configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60 |