aboutsummaryrefslogtreecommitdiff
path: root/src/flash
AgeCommit message (Collapse)Author
2019-02-21Fix support for single-bank stm32l4 processorsArmin van der Togt
Recent patches for STM32L4+ assumed all STM32L4 processors have a dual- bank option. This is not the case for STM32L4{3,4,5,6}xx processors and therefore, these processors (like STM32L433) failed when attempting to flash the second half of the flash memory. This patch fixed this issue. Tested on STM32L433xC, STM32L476xG and STM32L471xG. Change-Id: I8262ba4f05190802c5868d753f3e7af50e581811 Signed-off-by: Armin van der Togt <armin@otheruse.nl> Reviewed-on: http://openocd.zylin.com/4913 Tested-by: jenkins Reviewed-by: Peter Tettelaar <peter@float-iot.nl> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Mark Schulte <mschulte@lyft.com>
2019-02-07at91samd: Add flash programming support for SAMC2?N* partsKevin Vermilion
Added id, name, flash size and RAM size for following parts to samc20_parts[]: SAMC20N18A SAMC20N17A And the following to samc21_parts[]: SAMC21N18A SAMC21N17A Change-Id: Ie8cf1c531a60bfaed6e814d436d232afb89dae3f Signed-off-by: Kevin Vermilion <kevin.vermilion@gmail.com> Reviewed-on: http://openocd.zylin.com/4880 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07flash/nor/stm32f1x: Ability to change user option bytes.Jan Vojtech
Adds ability to change the user data in STM32F1x/STM32F3x MCU's option byte. Since OpenOCD prints the content of user data in option byte registers, it is seems logical to also provide a way how to change this data. Change-Id: Ie6cb756b4f11b5c6dabd34bc89434a358eb758ff Signed-off-by: Jan Vojtech <honza.vojtech@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4663 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-02-07target algo: do not write reg_param if direction is PARAM_INTomas Vanek
Without this change xxx_start_algorithm() writes all register parameters no matter of their direction. It usually results in writing of uninitialized reg_params[].value - possibly reported by valgrind. While on it fix the wrong parameter direction in kinetis_disable_wdog_algo(). This bug did not have any impact because of unconditional write of reg_params. Change-Id: Ia9c6a7b37f77d5eb6e5f5463012dddd50471742b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4813 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-05flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51Tomas Vanek
The new Microchip (former Atmel) series powered by Cortex-M4 looks very similar to older M0+ powered SAM D2x at the first sight. Unfortunately the new series differs a lot in important details. NVMCTRL has different register addresses, moved important bits and even changed binary command set. An universal driver for all SAM D/E would be very complicated. That's why a new driver was derived. Tested on Microchip SAM E54 Xplained Pro kit (board cfg included). Adjusted for the restructured dap support. Checked by valgrind and clang static analyzer. Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4272 Tested-by: jenkins Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
2019-02-04flash/nor/stm32f1x: use address instead of offset in stm32x_write_block()Tomas Vanek
stm32x_write_options() uses stm32x_write_block() at STM32_OB_RDP address. The change eliminates subtracting bank->base (and later adding it back). Change-Id: Icdd24afc7178b814be58e6033d4b93fdfb2d2a16 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4859 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2019-02-04flash/nor/stm32f1x: fix minor error messagesTomas Vanek
Change-Id: I1e9e62979c4629c8ba1d5ae89ca7392259969eb6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4858 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
2019-02-04flash/nor/at91samd: add samr34j18.Guillaume Revaillot
samr34/r35 combine SAML21 and SX1276 (lora transceiver). This one was found on xplaned pro evaluation kit. Ids for other r34/r35 chips are apparently not yet documented. Change-Id: I4054dd56ea53c9bae8d17abd5a3e4e65e1b9c8b1 Signed-off-by: Guillaume Revaillot <g.revaillot@gmail.com> Reviewed-on: http://openocd.zylin.com/4872 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-30arm_adi_v5: rewrite dap_to_jtag and dap_to_swdAntonio Borneo
The functions dap_to_jtag() and dap_to_swd() have been introduced by 3ef9beb52cd0 ("ADIv5 DAP ops switching to JTAG or SWD modes") in arm_adi_v5.c by using the JTAG queue only. Later, in 6f8b8593d63b ("ADIv5 transport support moves to separate files") the functions has been moved in adi_v5_swd.c and adi_v5_jtag.c but keeping the dependency from JTAG queue. The functions does not work if the current transport is not JTAG. Move back the functions in arm_adi_v5.c, replace the input parameter "target" with "dap", use the transport to detect if the JTAG queue is present, in case of SWD transport use the proper method, for other transports report error. Reuse the ADI v5 sequences already present in jtag/swd.h. Also, OpenOCD does not support switching to another transport after the initial selection, so do not change DAP's ops vector. Change-Id: Ib681fbaa60cb342f732bc831eb92de25afa4e4db Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4852 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-27command: initialize the command mode for every commandAntonio Borneo
All the commands in OpenOCD have been inspected and have the command mode initialize, apart for two of them. This is not critical, because the uninitialized value (0) is equivalent to the enum COMMAND_EXEC, that is also the correct value for the two mentioned commands. To keep the code consistent, initialize the command mode to COMMAND_EXEC. Change-Id: Iaf043364cbd1005418d787ed045a3ec653612382 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4861 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-21nrf5: add nrf5 device definition for HWID 0x00E3Mirko Vogt
This hardware id is e.g. used by the Insight SiP ISP1507-AX. Change-Id: I82568d292f9882372ab061d8e3e36906b0cc5882 Signed-off-by: Mirko Vogt <mirko.vogt@sensorberg.com> Reviewed-on: http://openocd.zylin.com/4845 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2019-01-16at91samd: added SAM-DA1 partsSeverin Junker
Change-Id: I1b206461052ee1897432e379505fdf95372a9e24 Signed-off-by: Severin Junker <s.junker@cartelsol.com> Reviewed-on: http://openocd.zylin.com/4835 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-11Add flash support for SiFive's Freedom E platformsTim Newsome
Valgrind and Clang Static Analyzer have no complaints about this change. Change-Id: I7757615ec52448372bdc57729cdf97c7016d97e8 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4656 Tested-by: jenkins Reviewed-by: Philipp Guehring <pg@futureware.at> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02NOR: lpc2000 Add support for LPC84x devicesRod Boyce
These devices differ from LPC8xx devices in that they have a different IAP entry point, but everything else is the same. Using Tcl to pass different IAP entry point. no new Clang analyser warnings and no new build sanitizers issues. Change-Id: I2d654dd250f416e74262c0228cad8713a283402f Signed-off-by: Rod Boyce <developer@teamboyce.co.uk> Reviewed-on: http://openocd.zylin.com/4684 Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02flash: nor: ath79: remove base calculationOleksij Rempel
Currently it is impossible to flash ELF with correct offsets. The reason is a bogus offset calculation extracted from base. Since any other spi drivers do not care about base, do the same for ath79 as well. Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4821 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02flash/nor/nrf5: set correct timeout for nvmc operationsJānis Skujenieks
Longest erase all FLASH for nRF5 series is 295.3 ms for nRF52832. Timeout period now is set to 340 ms (295.3 + 15%) Change-Id: Iae00ed7b634f111b9798db11e35e4e066d4aaa95 Signed-off-by: Jānis Skujenieks <janis.skujenieks@gmail.com> Reviewed-on: http://openocd.zylin.com/4822 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23Add LPC8Nxx and NHS3xx support.Jean-Christian de Rivaz
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1 Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Reviewed-on: http://openocd.zylin.com/4515 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-21add w600 supportSimon Qian
w600 is a wifi soc from winner micro(www.winnermicro.com). Change-Id: Ib8ccd6e52baefca6547fb97d29db75db0ee73948 Signed-off-by: Simon Qian <versaloon@simonqian.com> Reviewed-on: http://openocd.zylin.com/4801 Tested-by: jenkins Reviewed-by: yichen <wdyichen@wdyichen.cn> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-19flash/nor/spi: add adesto AT25DF081ATomas Vanek
8Mbit SPI flash on SAM D21 Xplained board Change-Id: Iec087f5d889c1cbdd4fed90863e73511f6101cec Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4802 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-12flash/nor/core: Fix chunk size calculation in default_flash_mem_blank_checkBohdan Tymkiv
Slow version of blank check procedure reads target memory sector-by-sector using 1 KB chunks. Due to bug in chunk size calculation algorithm the actual size of the chunk is always 1 KB even if sector size is smaller. This causes out-of-boundary read of the last sector. Steps to reproduce: 1) Use target with small sectors (e.g. psoc6 with 512-byte sectors) 2) set WORKAREASIZE_CM0 0 3) flash erase_check 1 Running slow fallback erase check - add working memory Info : SWD DPIDR 0x6ba02477 Error: Failed to read memory at 0x14008000 unknown error when checking erase state of flash bank #1 at 0x14000000 Bank is erased Change-Id: I03d0d5fb3a1950ae6aac425f5e24c7fd94b38325 Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4785 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-12flash/esirisc: refactor register write protectionSteven Stallion
This patch removes use of register write protection in protect() and protect_check() now that Change 4765 has merged. Change-Id: I42c429dc283c5b53989a6b98ebfc58214274ff16 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4791 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12esirisc: support eSi-TraceSteven Stallion
This patch adds support for instruction tracing to eSi-RISC targets. The command interface is borrowed heavily from ETM; eSi-Trace uses a less sophisticated model for tracing, however the setup and usage is similar. This patch also cleans up the command interfaces of the other esirisc command groups and adds additional debugging information to log messages when dealing with CSRs. This patch "finalizes" support for 32-bit eSi-RISC targets. Change-Id: Ia2a9de79a3c7c066240b5212721fb1b7584a9a45 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4780 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11flash/nor: Add support for sector erase in stm32l4x.c for L4+ familybob
Updates support for L4+ device id: 0x470 added by #4310 Extends #4641 to account for L4+ use of multiple DBANK option bits Enables L4+ 1M and 2M devices to be programmed using sector erase Change-Id: I42bb379d7d97986f4506423e3da503d07c787c6b Signed-off-by: bob <rea952@gmail.com> Reviewed-on: http://openocd.zylin.com/4777 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11flash/nor: update cc3220sf for issue found in code reviewEdward Fewell
Remove inappropriate use of bank_number. Change-Id: I11be1f2540cb09a3ccede35312f90bc8276af338 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4788 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11flash/nor: update CC26xx/CC13xx supportEdward Fewell
Added fixes found in additional code reviews. Remove inappropriate use of bank_number field and updated documentation to reflect the change. Restored functionality to cc2538.cfg file because previous change removed the cc26xx.cfg file because the flash support changes made it obsolete. Rolled the previous cc26xx.cfg file into cc2538.cfg and updated it to work with other recent changes. Tested using a SmartRF06 Evaluation board with embedded XDS100v3 and external XDs110. Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4787 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-06flash/stmsmi: fix byte order for big-endian hostAntonio Borneo
The original code was written for and tested on little-endian host only. Rewrite it to be independent by host endianess. Not tested on real HW; I don't own anymore a SPEAr device. Change-Id: I2f427a804693f56cb9dea4936c525eb814c48c28 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reported-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4778 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-05flash/nor: use default_flash_blank_check() instead of dummyTomas Vanek
Some flash drivers had a dummy method for erase_check. Use default_flash_blank_check() instead if possible. Change-Id: Iddfeff45ce477007328d061fcb5c553d93c3be98 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4766 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
2018-11-29SPI table updates (some new devices and new info)Andreas Bolsch
read_cmd, qread_cmd, pprog_cmd added as some recent high densities devices use variants for 4-byte addressing. Some new flash and FRAM device ids added. FRAMs don't have write pages nor erase commands or sector sizes. The corresponding entries are marked as "not used" (i. e. zero). Checks in existing SPI flash drivers added to handle these cases gracefully. Change-Id: I5104bce7c815ac22f98bc32c1bb6db66b984404a Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/4773 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-26flash/nor: consolidate flash protect/protect_checkTomas Vanek
Make flash_driver methods protect() and protect_check() optional. Remove dummy definitions of these methods from the drivers which do not implement protection handling. Some drivers did not define protect method. It raised segfault before this change and now it is handled properly. Lot of drivers returned ERROR_OK from dummy protect() - now flash_driver_protect() returns an error if not handled by the driver. Change-Id: I2d4a0da316bf03c6379791b1b1c6198fbf22e66c Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4765 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2018-11-26stm32l4x: Fix stm32l4x dual bank supportAlex J Lennon
The dual bank option was being incorrectly read and the bank b base incorrectly set. This is tested with 512kB dual bank configuration but needs checking with other configurations (e.g. 256kb). This fix should remove the need to use a mass_erase command prior to programming with OpenOCD Change-Id: I6e920f11b794c4c1fd34c0e44fb8fa01e7fe8f85 Signed-off-by: Alex J Lennon <alex.lennon@s19.tech> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4641 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Thomas Søhus <soehus@gmail.com>
2018-11-18efm32: correct erase address if bank->base != 0Andreas Kemnade
Prepare for additional flash banks not located at address 0 Change-Id: I60b78c917f94fa52bf24df9e3315536f776eec84 Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-on: http://openocd.zylin.com/4440 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-03flash/nor/stm32f1x: Use of protection blocks, improved option bytes handlingDominik Peklo
Handle write protection status in blocks instead of sectors, removing unnecessary complexity in the process. Now closer to stm32f2x. Support sequential modification of option bytes by read/modify/write directly to option bytes area instead of always starting with the currently loaded bytes from FLASH_OBR/WRPR registers. Added new command 'options_load' to force re-load of option bytes w/o having to power cycle target. Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d Signed-off-by: Dominik Peklo <dom.peklo@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4576 Tested-by: jenkins Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com>
2018-11-02flash/nor/at91samd: add SAMR21E19A DIDTomas Vanek
While on it correct RAM amount of SAMR21x16A devices Change-Id: Ie9ab9de1551bdceff17af7597a9a2ee41f5aebe0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4734 Reviewed-by: Eduardo Montoya Tested-by: jenkins
2018-10-16esirisc: support eSi-RISC targetsSteven Stallion
eSi-RISC is a highly configurable microprocessor architecture for embedded systems provided by EnSilica. This patch adds support for 32-bit targets and also includes an internal flash driver and uC/OS-III RTOS support. This is a non-traditional target and required a number of additional changes to support non-linear register numbers and the 'p' packet in RTOS support for proper integration into EnSilica's GDB port. Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4660 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-08flash/nrf5: support for nRF52810Anders Westrup
Change-Id: I01c430bfa593d20ea7a51c90d67052e374d239b3 Signed-off-by: Anders Westrup <anders@westrup.se> Reviewed-on: http://openocd.zylin.com/4680 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Slowcoder <slowcoder@gmail.com>
2018-09-19Added support for STM32L4X option bytes writing.Thomas Søhus
Enables the programming of Write protection lock bits. - Updated/re-factored with option_read, option_write and option_load commands. Change-Id: I86358c7eb1285c3c0baac1564e46da8ced5fd025 Signed-off-by: Thomas Søhus <tls@ceepro.dk> Reviewed-on: http://openocd.zylin.com/4654 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-17flash/nrf5: support for nRF52840 Q1AAC0Kai Geissdoerfer
Change-Id: Id3280dadece84e1d68544936e44d506c7930a55d Signed-off-by: Kai Geissdoerfer <kai.geissdoerfer@tu-dresden.de> Reviewed-on: http://openocd.zylin.com/4649 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-17flash/nrf5: time-based timeout waiting for flash controllerKai Geissdoerfer
Change-Id: Id214df154dc359ca130c8d8fe1554d106621b9cd Signed-off-by: Kai Geissdoerfer <kai.geissdoerfer@tu-dresden.de> Reviewed-on: http://openocd.zylin.com/4648 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-09flash/stm32f2x: add stm32f7 revision Z identificationCody Schafer
Signed-off-by: Cody P Schafer <openocd@codyps.com> Change-Id: Ia0169514d494bae2a98d92ebc97c8eccc10bc6c4 Reviewed-on: http://openocd.zylin.com/4657 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-21flash/at91sam4: fix clang static analyzer warningTomas Vanek
Change-Id: I5e5319d855c868adfa012f68086f7f809ec5a069 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4639 Tested-by: jenkins
2018-08-21flash/at91sam4: set wait states only once per writeTomas Vanek
Read-modify-write setting of FMR register requires an USB turnaround. Setting FMR before each page write is not necessary and decreases the write speed. Change-Id: I67844c898aaf117f155c762c979840b603c767ed Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4611 Tested-by: jenkins Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21flash/at91sam4: emit flash bank infoTomas Vanek
Change related LOG_INFO to LOG_DEBUG Change-Id: I0c09b1ec83da631b26980dc8632b9031fe2921a3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4610 Tested-by: jenkins Reviewed-by: Erwin Oegema <blablaechthema@hotmail.com> Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21flash/at91sam4: run probe just onceTomas Vanek
Reread registers in sam4_GetInfo() Change-Id: I3b023b3e642a9c052b5c41673d196317f7e7f2e3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4609 Tested-by: jenkins Reviewed-by: Erwin Oegema <blablaechthema@hotmail.com> Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21max32xxx: Support for MAX32XXX devices.Kevin Gillespie
Adding flash programming support for Maxim Integrated MAX32XXX devices. Change-Id: I5b0f57a885f9d813240e4bc2d9f765b743e1cfc3 Signed-off-by: Kevin Gillespie <kgills@gmail.com> Reviewed-on: http://openocd.zylin.com/3543 Tested-by: jenkins Reviewed-by: Ismail H. KOSE <ihkose@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-08-01nrf5: add free_driver_privJim Paris
Change-Id: I429a9868deb0c4b51f47a4bbad844bdc348e8d21 Signed-off-by: Jim Paris <jim@jtan.com> Reviewed-on: http://openocd.zylin.com/4608 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01flash/nor/tcl.c: fix flash bank bounds check in 'flash fill' command handlerBohdan Tymkiv
Steps to reproduce ( STM32F103 'Blue Pill', 128KiB of flash ): > flash fillh 0x0801FFFE 00 1 wrote 2 bytes to 0x0801fffe in 0.019088s (0.102 KiB/s) > flash fillw 0x0801FFFE 00 1 Error: stm32f1x.cpu -- clearing lockup after double fault Error: error waiting for target flash write algorithm Error: error writing to flash at address 0x08000000 at offset 0x0001fffe Change-Id: I145092ec5e45bc586b3df48bf37c38c9226915c1 Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4516 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18nrf5: Add HWID 0x139 (52832 rev E0)James Jacobsson
Change-Id: I71b7471ccfcb8fcc6de30da57ce4165c7fb1f73f Signed-off-by: James Jacobsson <slowcoder@gmail.com> Reviewed-on: http://openocd.zylin.com/4604 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18flash/nor/stm32lx: Add revision 'V' for STM32L1xx Cat.3 devicesMarc Schink
Change-Id: Ic92b0fb5b738af3bec79ae335876aa9e26f5f4cd Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4600 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-07-18flash/nor/at91sam4: fix sam4sa16c flash banks and its gpnvms countErwin Oegema
There was already a github fork that had this fixed, but as we try to use the latest, non-modified version of all software we use, I would like to have this fix in the next releases of OpenOCD so that if people uses $packagemanager, they will not have issues flashing the last part of the flash of sam4sa16c chips. Additionally, I've added some more logging related to the flash bank that was used, and the chip ID that was detected. Change-Id: I7ea5970105906e4560b727e46222ae9a91e41559 Signed-off-by: Erwin Oegema <blablaechthema@hotmail.com> Reviewed-on: http://openocd.zylin.com/4599 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2018-07-18flash/nor: add support for TI MSP432 devicesEdward Fewell
Added msp432 flash driver to support the TI MSP432P4x and MSP432E4x microcontrollers. Implemented the flash algo helper as used in the TI debug and flash tools. This implemention supports the MSP432E4, Falcon, and Falcon 2M variants. The flash driver automatically detects the connected variant and configures itself appropriately. Added command to mass erase device for consistency with TI tools and added command to unlock the protected BSL region. Tested using MSP432E401Y, MSP432P401R, and MSP432P4111 LaunchPads. Tested with embedded XDS110 debug probe in CMSIS-DAP mode and with external SEGGER J-Link probe. Removed ti_msp432p4xx.cfg file made obsolete by this patch. Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4153 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-10 04:28:41 +0000