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2014-03-17flash: Constify write bufferAndreas Fritiofson
Change-Id: Ic812098d3ed5a2992c26bb57d08ae350e2c5d5d8 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2040 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-07flash: fix mini51 cygwin build issuesJohn David Anglin
Under certain versions of cygwin it appears PAGE_SIZE is already defined. So change name to stop any possible build issues. Change-Id: I6f0e0c352c06bb6118ac3a5b884ae8e93194b570 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1675 Tested-by: jenkins
2013-10-03flash/nor: Make info function optionalAndreas Fritiofson
Remove lots of no-op or dummy info function implementations and check if it's implemented before invoking it. Change-Id: I2144dad6a84a80359bb13a8a29a4614387e4c135 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1642 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-25build: fix NetBSD build warningPetri Laakso
Seems NetBSD does like the name reboot, so rename to keep happy. Change-Id: I60ada9d217c4a8386a8d1ff1c88db7335451794e Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1623 Tested-by: jenkins Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2013-09-08mini51: support for Nuvoton NuMicro Mini51 series flash memoryCosmin Gorgovan
Adds a flash driver for Nuvoton MINI51, MINI52 and MINI54 microcontrollers. At the moment, it only supports the erase and write operations. These microcontrollers have a 4 / 8 / 16 KB APROM for application code and a 2 KB LDROM for bootloaders. When the MCU has booted off the APROM, the LDROM isn't mapped in memory but can be programmed, and the other way around. This means that the ARM core is typically rebooted for programming. After a successful write or erase operation, it is rebooted again, using the initial boot source. This driver only supports programming the APROM. This driver is a pure JTAG implementation, it doesn't use any SRAM. I've tested it on a MINI54ZAN microcontroller using an ST-LINK/V2. With the microcontroller running at the default clock frequency of 22.1184 MHz, speed seems to be around 1.1 KB/s. Change-Id: I180889c55af9fb5614cd99a953b755baba14288a Signed-off-by: Cosmin Gorgovan <cosmin@linux-geek.org> Reviewed-on: http://openocd.zylin.com/1546 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>