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no logic changes, only coding style (spaces to tabs, etc)
Change-Id: I5933447c633990e103bc62d088ca2e12f11f031d
Signed-off-by: rodrigo_l_rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/253
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
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when last==first==0 then mass erase is executed, it's faster.
the page marking was wrong in this case.
Change-Id: I5c579d59b5c4778cf057cb5986e086abdd4209b2
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/232
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
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the unlocking procedure erases the flash mem (even if it wasn't locked), so it should be marked as erased after unlocking.
Change-Id: I5cc6a1e1d6cf4e1f243de532eff54111ffd66187
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/222
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
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crc check was always performed on newly flashed data, now it is optional
flash mem can be locked by writing a specific word to a specific address in flash.
to verify flash, target must be halted, and this will (when the new halt sequence is implemented) require reseting the chip. if the target is reset after writing the lock words, then it will lock, hence the CRC will fail because it is not possible to read stuff from the target.
also added a function that resets the jtag state machine.
this is not used yet, but will be soon.
it is implemented to allow strict control over JTAG state machine, necessary to implement to halt and unlocking sequences.
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