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2019-03-27smp: replace commands smp_on/smp_off with "smp [on|off]"Antonio Borneo
Seams over-engineered having two separate commands to turn SMP on/off. Plus it is missing the possibility to dump the current status of SMP and would be weird adding an additional command for it. Moreover, such commands are replicated in few targets so it would make sense centralizing them. - Deprecate the commands "smp_on" and "smp_off". - Add a new command "smp" that accepts optional parameters "[on|off]" and prints the SMP status when run without parameters. This replaces the two commands above. - Put the deprecated and the new command handlers in smp.c - Update the documentation, except for mips_m4k, since it is not available yet. - Promote the macro foreach_smp_target to global context and use it where possible. Change-Id: Ia72841c1a3bd6edd4db4cc809046322f498617e6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4615 Tested-by: jenkins Reviewed-by: Graham Sanderson <graham.sanderson@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27Lots of RISC-V improvements.Tim Newsome
This represents months of continuing RISC-V work, with too many changes to list individually. Some improvements: * Fixed memory leaks. * Better handling of dbus timeouts. * Add `riscv expose_custom` command. * Somewhat deal with cache coherency. * Deal with more timeouts during block memory accesses. * Basic debug compliance test. * Tell gdb which watchpoint hit. * SMP support for use with -rtos hwthread * Add `riscv set_ir` Change-Id: Ica507ee2a57eaf51b578ab1d9b7de71512fdf47f Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4922 Tested-by: jenkins Reviewed-by: Philipp Guehring <pg@futureware.at> Reviewed-by: Liviu Ionescu <ilg@livius.net> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-08rtos/hwthread: add hardware-thread pseudo rtosMatthias Welwarsky
This patch adds "hwthread", a pseudo rtos that represents cpu cores in an SMP system as threads to gdb. This allows to debug SMP system kernels in a more sensible manner and removes the current atrocities of switching gdb manually between CPU cores to update the context. Change-Id: Ib781c6c34097689d21d9e02011e4d74a4a742379 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3999 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Graham Sanderson <graham.sanderson@gmail.com>
2019-03-04armv8: allow halt on exceptionMatthias Welwarsky
add command 'catch_exc' to halt a core on entering any of Secure EL1 or EL3 or Non-Secure EL1 or EL2. Change-Id: I0c68e247af68dd96616855a9bc1063c277d222e5 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4479 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-27flash: stm32f2/f4/f7: Add One-Time-Porgrammable (OTP) supportMoritz Fischer
The OTP is part of the flash memory. It has 512 (1024 for F7) bytes and is organized in 16 sectors with 32 (64 for F7) bytes each. The OTP is exposed as separate flash bank 1 and can be used with the usual flash commands. Writing the OTP can be done as follows: > stm32f2x otp 1 enable > flash write bank 1 foo.bin 0 > mdw 0x1fff7800 4 > verify_image foo.bin 0x1fff7800 > stm32f2x otp 1 disable Note: This patch is largely a rebase/cleanup of a patch from 2012 by Laurent Charpentier and he did most of the work. No new Clang-Analyzer warnings. Change-Id: I5e6371f6a7c7a9929c1d7907d6ba4724f9d20d97 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/829 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-19ftdi: use "adapter usb location" instead of ftdi_location commandOleksij Rempel
Use unified "adapter usb location" instead of driver specific command. Change-Id: I568a76b87d09cea0f40f1580cf81f7c51402f6f1 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4771 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-14doc: fix typo in "adapter usb location" commandOleksij Rempel
Change-Id: If959c5461904cdf4bcdf1887a9afaa9c2c94282b Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4907 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-14doc/openocd.texi: fix xref warningTomas Vanek
Xref without trailing '.' or ',' was introduced in deaf3d264123391d8fe5c4cccbf8fb8852e1be23 Change-Id: I99afd40e1ffeddd1298b7b07e4deba3dcc41799f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4905 Tested-by: jenkins
2019-02-07doc: add documentation for "adapter usb location" commandOleksij Rempel
Change-Id: Ia3fbe0c3894b1b96464bbfda5d4101123827b761 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4769 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07flash/nor/stm32f1x: Ability to change user option bytes.Jan Vojtech
Adds ability to change the user data in STM32F1x/STM32F3x MCU's option byte. Since OpenOCD prints the content of user data in option byte registers, it is seems logical to also provide a way how to change this data. Change-Id: Ie6cb756b4f11b5c6dabd34bc89434a358eb758ff Signed-off-by: Jan Vojtech <honza.vojtech@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4663 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-02-05flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51Tomas Vanek
The new Microchip (former Atmel) series powered by Cortex-M4 looks very similar to older M0+ powered SAM D2x at the first sight. Unfortunately the new series differs a lot in important details. NVMCTRL has different register addresses, moved important bits and even changed binary command set. An universal driver for all SAM D/E would be very complicated. That's why a new driver was derived. Tested on Microchip SAM E54 Xplained Pro kit (board cfg included). Adjusted for the restructured dap support. Checked by valgrind and clang static analyzer. Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4272 Tested-by: jenkins Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
2019-01-11Add flash support for SiFive's Freedom E platformsTim Newsome
Valgrind and Clang Static Analyzer have no complaints about this change. Change-Id: I7757615ec52448372bdc57729cdf97c7016d97e8 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4656 Tested-by: jenkins Reviewed-by: Philipp Guehring <pg@futureware.at> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-08drivers: xds110: Add support for XDS110 stand-alone probeEdward Fewell
The XDS110 stand-alone version has the ability to supply voltage to the target board via it's AUX FUNCTIONS port. Added command to enable setting the voltage on the XDS110 stand-alone. Change-Id: I2f21c4a3d15ed99e649f3a83973c5e724c4bfeb6 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4793 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-02NOR: lpc2000 Add support for LPC84x devicesRod Boyce
These devices differ from LPC8xx devices in that they have a different IAP entry point, but everything else is the same. Using Tcl to pass different IAP entry point. no new Clang analyser warnings and no new build sanitizers issues. Change-Id: I2d654dd250f416e74262c0228cad8713a283402f Signed-off-by: Rod Boyce <developer@teamboyce.co.uk> Reviewed-on: http://openocd.zylin.com/4684 Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02flash: nor: ath79: remove base calculationOleksij Rempel
Currently it is impossible to flash ELF with correct offsets. The reason is a bogus offset calculation extracted from base. Since any other spi drivers do not care about base, do the same for ath79 as well. Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4821 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23Add LPC8Nxx and NHS3xx support.Jean-Christian de Rivaz
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1 Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Reviewed-on: http://openocd.zylin.com/4515 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-21add w600 supportSimon Qian
w600 is a wifi soc from winner micro(www.winnermicro.com). Change-Id: Ib8ccd6e52baefca6547fb97d29db75db0ee73948 Signed-off-by: Simon Qian <versaloon@simonqian.com> Reviewed-on: http://openocd.zylin.com/4801 Tested-by: jenkins Reviewed-by: yichen <wdyichen@wdyichen.cn> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-19target/cortex_m: fix cortex_m reset_config help and check for syntax errorTomas Vanek
Remove option 'srst' which is not recognized from on-line help and texi. Check parameter and return syntax error if wrong option is entered. Change-Id: I87daa423a9f53193a0b015080594820b933628f5 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4795 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19target/cortex_m: do not use VECTRESET on Cortex-M0, M0+ and M1Tomas Vanek
Cortex-M0, M0+ and M1 do not support VECTRESET bit in AIRCR. Without this change the 'reset' command silently fails if VECTRESET is requested. Detect these cores, show warning if VECTRESET is about to use and use SYSRESETREQ instead. Change-Id: Ief174373e3ef0e6b287c57911c0aca4dfa8209f2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4794 Tested-by: jenkins Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-12esirisc: support eSi-TraceSteven Stallion
This patch adds support for instruction tracing to eSi-RISC targets. The command interface is borrowed heavily from ETM; eSi-Trace uses a less sophisticated model for tracing, however the setup and usage is similar. This patch also cleans up the command interfaces of the other esirisc command groups and adds additional debugging information to log messages when dealing with CSRs. This patch "finalizes" support for 32-bit eSi-RISC targets. Change-Id: Ia2a9de79a3c7c066240b5212721fb1b7584a9a45 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4780 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11flash/nor: update CC26xx/CC13xx supportEdward Fewell
Added fixes found in additional code reviews. Remove inappropriate use of bank_number field and updated documentation to reflect the change. Restored functionality to cc2538.cfg file because previous change removed the cc26xx.cfg file because the flash support changes made it obsolete. Rolled the previous cc26xx.cfg file into cc2538.cfg and updated it to work with other recent changes. Tested using a SmartRF06 Evaluation board with embedded XDS100v3 and external XDs110. Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4787 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-06doc: add ARMv6-M info regarding TAP DeclarationSpencer Oliver
Change-Id: I89095fd0c830fdc2ce40e5d23f8af98502b0ff50 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/4782 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-06doc: fix some typo about STMicroelectronics nameAntonio Borneo
s/ST/STMicroelectronics/ s/ST Micro/STMicroelectronics/ s/ST Microelectronics/STMicroelectronics/ Change-Id: I62aef331d172db22a70841a089c1889e37997cde Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4718 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06stlink: add support for STLINK-V3Antonio Borneo
Extend the driver to include the minimal functionality to support the HLA model. Due to the small change in the name (ST-LINK/V2 => STLINK-V3), fix the existing names in the comments in udev rules. Change-Id: Ied33e38063a6da81d9bf249ed195444d7cdf4f03 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4717 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06jtag: drivers: ft232r: unhardcodedEMARD
FT232R: introducing configurable parameters for pinout, initial buffer size, state of RS232 signals at exit with option to reattach kernel driver. All this was hardcoded before. New parameters are documented in "openocd.texi" file. Allows hopfully self-explainable and user-friendly adaptation to various pinouts and similar chips like FT230X and FT231X. Change-Id: Ib807f2ea3d4c1a164d351d65aeacd1978318d217 Signed-off-by: EMARD <vordah@gmail.com> Reviewed-on: http://openocd.zylin.com/4681 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-11-08armv7a: ARMv7-A MMU toolsMatthias Welwarsky
factor out mmu-related code from armv7a.c, add a 'dump' command for page tables. Change-Id: Ic1ac3c645d7fd097e9d625c7c8302e7065875dd4 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4327 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-03flash/nor/stm32f1x: Use of protection blocks, improved option bytes handlingDominik Peklo
Handle write protection status in blocks instead of sectors, removing unnecessary complexity in the process. Now closer to stm32f2x. Support sequential modification of option bytes by read/modify/write directly to option bytes area instead of always starting with the currently loaded bytes from FLASH_OBR/WRPR registers. Added new command 'options_load' to force re-load of option bytes w/o having to power cycle target. Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d Signed-off-by: Dominik Peklo <dom.peklo@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4576 Tested-by: jenkins Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com>
2018-10-16esirisc: support eSi-RISC targetsSteven Stallion
eSi-RISC is a highly configurable microprocessor architecture for embedded systems provided by EnSilica. This patch adds support for 32-bit targets and also includes an internal flash driver and uC/OS-III RTOS support. This is a non-traditional target and required a number of additional changes to support non-linear register numbers and the 'p' packet in RTOS support for proper integration into EnSilica's GDB port. Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4660 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-25Clarify what exactly the RISC-V code supports.Tim Newsome
Change-Id: I8da657426cc52c738ab41bfb0164cbc6721c0aef Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4655 Tested-by: jenkins Reviewed-by: Philipp Guehring <pg@futureware.at> Reviewed-by: Liviu Ionescu <ilg@livius.net> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-19Added support for STM32L4X option bytes writing.Thomas Søhus
Enables the programming of Write protection lock bits. - Updated/re-factored with option_read, option_write and option_load commands. Change-Id: I86358c7eb1285c3c0baac1564e46da8ced5fd025 Signed-off-by: Thomas Søhus <tls@ceepro.dk> Reviewed-on: http://openocd.zylin.com/4654 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-17doc: fix use of deprecated config file in the exampleAntonio Borneo
Commit 31c58c139d85 ("jtag: drivers: stlink: handle all versions with single config") deprecates the use of "interface/stlink-v2-1.cfg" in favor of a unique config file "interface/stlink.cfg". Update the example in the documentation. Change-Id: I1aed7c70e15f4edb4f81a3ee8e3bce575fde873b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4667 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-09-07gdb_server: add per target option "-gdb-port"Antonio Borneo
The argument passed to global config command "gdb_port" is usually, but not always, a TCP port number. In case of multiple targets, this numeric value is used as the first port of a set of consecutive TCP ports assigned one per target. If the argument is not a numeric value (e.g. "pipe", "disabled", ...) then incrementing it for the next target has no sense. Add the option "-gdb-port number" to the commands "target create" and "$target_name configure" to override, for the specific target, the general global configuration. This permits to use a per target "-gdb-port disabled", when no gdb port is required for that specific target. It also makes possible to choose a custom TCP port number for each target, overriding the usual sequence of consecutive port numbers. Change-Id: I3b9a1910b28ab4bc757e839d0e5d08ffc29f7ab4 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4530 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-14doc: fix typo in cortex_m maskisr commandChristopher Head
Change-Id: I37795c320ff7cbf6f2c7434e03b26dbaf6fc6db4 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4621 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01rtos: add support for NuttXMasatoshi Tateishi
This patch introduces RTOS support for NuttX. Currently, only ARM Cortex-M (both FPU and FPU-less) targets are supported. To use, add the following lines to ~/.gdbinit. define hookpost-file eval "monitor nuttx.pid_offset %d", &((struct tcb_s *)(0))->pid eval "monitor nuttx.xcpreg_offset %d", &((struct tcb_s *)(0))->xcp.regs eval "monitor nuttx.state_offset %d", &((struct tcb_s *)(0))->task_state eval "monitor nuttx.name_offset %d", &((struct tcb_s *)(0))->name eval "monitor nuttx.name_size %d", sizeof(((struct tcb_s *)(0))->name) end And please make sure the above values are the same as in src/rtos/nuttx_header.h Change-Id: I2aaf8644d24dfb84b500516a9685382d5d8fe48f Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com> Signed-off-by: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com> Signed-off-by: Nobuto Kobayashi <Nobuto.Kobayashi@sony.com> Reviewed-on: http://openocd.zylin.com/4103 Tested-by: jenkins Reviewed-by: Alan Carvalho de Assis <acassis@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01target/arm_adi_v5: add command "dpreg"Antonio Borneo
For very low level debug or development around DAP, it is useful to have direct access to DP registers. Add command "dpreg" by mimic the syntax of the existing "apreg" command: $dap_name dpreg reg [value] Change-Id: Ic4ab451eb5e74453133adee61050b4c6f656ffa3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4612 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01server: explicitly call "shutdown" when catch CTRL-C or a signalAntonio Borneo
Every TCL command can be renamed (or deleted) and then replaced by a TCL proc that has the same name of the original TCL command. This can be used either to completely replace an existing command or to wrap the original command to extend its functionality. This applies also to the OpenOCD command "shutdown" and can be useful, for example, to set back some default value to the target before quitting OpenOCD. E.g. (TCL code): rename shutdown original_shutdown proc shutdown {} { puts "This is my implementation of shutdown" # my own stuff before exit OpenOCD original_shutdown } Unfortunately, sending a signal (or pressing CTRL-C) to terminate OpenOCD doesn't trigger calling the original "shutdown" command nor its (eventual) replacement. Detect if the main loop is terminated by an external signal and in such case execute explicitly the command "shutdown". Replace with enum the magic numbers assumed by "shutdown_openocd". Please notice that it's possible to write a custom "shutdown" TCL proc that does not call the original "shutdown" command. This is useful, for example, to prevent the user to quit OpenOCD by typing "shutdown" in the telnet session. Such case will not prevent OpenOCD to terminate when receiving a signal; OpenOCD will quit after executing the custom "shutdown" command. Change-Id: I86b8f9eab8dbd7a28dad58b8cafd97caa7a82f43 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4551 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-24Add RISC-V support.Tim Newsome
This supports both 0.11 and 0.13 versions of the debug spec. Support for `-rtos riscv` will come in a separate commit since it was easy to separate out, and is likely to be more controversial. Flash support for the SiFive boards will also come in a later commit. Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4578 Tested-by: jenkins Reviewed-by: Liviu Ionescu <ilg@livius.net> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-18flash/nor: add support for TI MSP432 devicesEdward Fewell
Added msp432 flash driver to support the TI MSP432P4x and MSP432E4x microcontrollers. Implemented the flash algo helper as used in the TI debug and flash tools. This implemention supports the MSP432E4, Falcon, and Falcon 2M variants. The flash driver automatically detects the connected variant and configures itself appropriately. Added command to mass erase device for consistency with TI tools and added command to unlock the protected BSL region. Tested using MSP432E401Y, MSP432P401R, and MSP432P4111 LaunchPads. Tested with embedded XDS110 debug probe in CMSIS-DAP mode and with external SEGGER J-Link probe. Removed ti_msp432p4xx.cfg file made obsolete by this patch. Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4153 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-15flash/nor: Add support for TI CC26xx/CC13xx flashEdward Fewell
Added cc26xx flash driver to support the TI CC26xx and CC13xx microcontrollers. Driver is capable of determining which MCU is connected and configures itself accordingly. Added config files for four specific variants: CC26x0, CC13x0, CC26x2, and CC13x2. Note that the flash loader code is based on the sources used to support flash in Code Composer Studio and Uniflash from TI. Removed cc26xx.cfg file made obsolete by this patch. Change-Id: Ie2b0f74f8af7517a9184704b839677d1c9787862 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4358 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
2018-06-06psoc5lp: Add NV Latch flash driverAndreas Färber
Erasing is not supported by the hardware, it can be written directly. Tested on CY8CKIT-059, except modifying-write. Change-Id: I6e920ed930dcd5c7f0b10c5b1b4791a828d9080a Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3434 Tested-by: jenkins
2018-06-06psoc5lp: Add EEPROM flash driverAndreas Färber
Tested on CY8CKIT-059. Change-Id: Ib02262e8eebf0df3d29492b8a7daa65b262da580 Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3433 Tested-by: jenkins
2018-06-06flash/nor: Add PSoC 5LP flash driverAndreas Färber
Always probe for ECC mode and display ECC sectors if disabled. Non-ECC write is implemented as zeroing the ECC/config bytes. Erasing ECC sectors is ignored, erase-checking takes them into account. Tested with CY8CKIT-059 (CY8C5888), except ECC mode. Change-Id: If63b9ffca7ad8de038be3c086c49712b629ec554 Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/3432 Tested-by: jenkins
2018-06-06flash/nor: Add support for TI CC3220SF internal flashEdward Fewell
Added cc3220sf flash driver to support the TI CC3220SF microcontrollers. Implemented flash driver to support the internal flash of the CC3220SF. The implementation does not support the serial flash of the CC32xx family that requires connection over UART, and not via JTAG/SWD debug. Added config files for both CC32xx devices (no flash) and CC3220SF (with flash). Updated to implement comments from code review. Additional updates to handle remaining comments from review. Additional updates per review. Added code to only request aligned writes and full 32-bit words down to flash helper algorithm. Updated for recent changes in OpenOCD flash code. Removed cc32xx.cfg file made obsolete by this patch. Change-Id: I58fc1478d07238d39c7ef02339f1097a91668c47 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4319 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-04Rework/update ARM semihostingLiviu Ionescu
In 2016, ARM released the second edition of the semihosting specs ("Semihosting for AArch32 and AArch64"), adding support for 64-bits. To ease the reuse of the semihosting logic for other platforms (like RISC-V), the semihosting code was isolated from the ARM target and updated to the latest specs. The new code is already in use since January (in GNU MCU Eclipse OpenOCD) and no problems were reported, neither for ARM nor for RISC-V targets, after more than 7K downloads. The 2 new files were formatted with uncrustify. Change-Id: Ie84dbd86a547323bb8a5d24eab68fc7dad013d96 Signed-off-by: Liviu Ionescu <ilg@livius.net> Reviewed-on: http://openocd.zylin.com/4518 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-31jtag/drivers: Add support for TI XDS110 debug probeEdward Fewell
Add support for the XDS110 debug probe using the APIs in the probe's firmware. Includes support for older versions of the firmware (with reduced performance) and support for a newer version that includes OpenOCD specific APIs. Tested on various TI LauchPads including MSP432P4, MSP432E4, CC2650, CC2652, and CC3220SF. Updated to add better support for swd switch. Removed issues found with clang static analysis. Updated to add rules entry for the XDS110 probe and Tiva DFU mode (which affects both XDS110 and ICDI probes). Change-Id: Ib274143111a68e67e80003797c6a68e3e80976b2 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4322 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-09doc: fix several typos within manual documentsAntonio Borneo
Mostly trivial fixes spotted by spell checker Change-Id: I3af693faf5506c866e2abe253a0e37aea3c4d284 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4510 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-26doc: fix several typos in openocd.texiAntonio Borneo
Mostly trivial fixes spotted by spell checker One fix s/are/is/ No changes in the content of the document Change-Id: Ic2d8696860c540e901e8c5190f8f1e7dce80545f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4402 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-12target/cortex_m: allow setting the type of a breakpointTomas Vanek
Cortex-M target used 'auto_bp_type' mode. The requested type of breakpoint was ignored and hard (FPB) breakpoints were set in 'code memory area' 0x00000000-0x1fffffff, soft breakpoints were set above 0x20000000. The code memory area of Cortex-M does not mean the memory is flash and vice versa. External flash (parallel or QSPI) is usually mapped above code memory area. Cortex-M7 ITCM RAM is mapped at 0. Kinetis has a RAM block under 0x20000000 boundary. Remove 'auto_bp_type' mode, set breakpoints to requested type. Change 'cortex_m maskisr auto' handling to use a hard temporary breakpoint everywhere: it can also workaround not working soft breakpoints on Cortex-M7 with ICache enabled. Change-Id: I7a9f9464c5e10bfd7f17cba1037ed07a064fa2e8 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4429 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07target/arm_adi_v5: extend apcsw command to accept arbitrary bitsTomas Vanek
apcsw command was limited to SPROT bit only. Now user can manipulate any bit except size and addrinc fields. Can be used e.g. to set bus signal 'cacheable' on Cortex-M7 Change-Id: Ia1c22b208e46d1653136f6faa5a7aaab036de7aa Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4431 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07Add gdb_report_register_access_error commandTim Newsome
With this option enabled (it's disabled by default) errors accessing registers are returned to gdb. Otherwise they are ignored and success is reported to gdb. (This is the current behavior.) We want this for RISC-V, but there's still some cleanup that needs to be done before that can be upstreamed. Signed-off-by: Tim Newsome <tim@sifive.com> Change-Id: I7e56109ea52d18b780c14a07fb35f9e6e8979da4 Reviewed-on: http://openocd.zylin.com/4452 Reviewed-by: Steven Stallion <sstallion@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Tested-by: jenkins
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-21 09:22:21 +0000