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2013-05-05The openocd-0.7.0 release.v0.7.0Freddie Chopin
Change-Id: I08157f47ac056e6d2089119dd2d6cbab11b521e8 Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-05-02doc: add info about FT232H and JTAG-lock-pick Tiny 2 adapterFreddie Chopin
Change-Id: I3b1047580669da3f17ea87183536275a10671fec Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/1367 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-02doc: Update list of interfaces, targets and boardsFreddie Chopin
Change-Id: If9481e061f09a37f9ee3c461a1a0ce4d382a9a0d Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/1366 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-02dev-doc: fix to release process docsFreddie Chopin
Change-Id: I916e7ff1af211baef1c6d56fd44d292ee6983599 Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/1368 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-02cfg: remove whitespaceSpencer Oliver
Change-Id: I20edbb50efc03711195102f4c6dc8bcfaf043d44 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1374 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-05-02cfg: ignore ICEPick jrc tap versionSpencer Oliver
Due to reports of newer targets using a updated version of the ICEPick tap rather than add another tapid we ignore the tap version. Also see Trac 49 for details. Change-Id: Ic78414c54af2545c817e1bb2c860970c1b587259 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1373 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-28Restore -dev suffixFreddie Chopin
Change-Id: I26f49e02d228b59533237607fa8307ecc627409e Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28The openocd-0.7.0-rc2 release candidate.v0.7.0-rc2Freddie Chopin
Change-Id: I0a3576dd098d73437547b619c726cacd8f1dba64 Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28target: rename cortex_a8 to cortex_aSpencer Oliver
Rename cortex_a8 target to use a more correct cortex_a name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: I0eb1429c9281321efeb444b27a662a941a2ab67f Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1130 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28target: rename cortex_m3 to cortex_mSpencer Oliver
Rename cortex_m3 target to use a more correct cortex_m name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: Ia8429f38e88da677249c5caa560c50f8ce56ea10 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1129 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28Mention "lpc4300" (with "lpc1800" alias) flash drivers in manualFreddie Chopin
Change-Id: I0bb28910b2c07b1ca5bd644e0d88b931d585d3e7 Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/1352 Tested-by: jenkins
2013-04-28cortex_m: remove old target breakpoints/watchpointsSpencer Oliver
Sometimes the target may have breakpoint registers set from a previous debug session, we can either sync them or as we have chosen here clear them. Change-Id: I439a623ebbf010246a70e5596d04aa7d546da731 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1363 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28kinetis: fix "SF1" parts to limit FlexRAM usageChristopher Kilgour
Ensure FlexRAM usage is limited to half the FlexRAM size when programming. Assume the FlexNVM sector size is equal to half the FlexRAM. Fix sector erase checking which had an error introduced when the kinetis_ftfx_command( ) signature was changed. Change-Id: I88edd9c7d4a4ba474cad7b00052feaeedfa8ced8 Signed-off-by: Christopher Kilgour <techie@whiterocker.com> Reviewed-on: http://openocd.zylin.com/1358 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28build: fix libftd2xx regressionSpencer Oliver
Fix build when targeting closed src ftd2xx drivers. configure is unable to find the dynamic linking loader lib (dl) as it is included before ftd2xx library. Change-Id: Ibe7308b66ed846288a31f7a27ff549b6f39baeec Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1355 Tested-by: jenkins Reviewed-by: Luca Bruno <lucab@debian.org> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28arm: fix arm reg regressionSpencer Oliver
Seems commit fc2abe63fd3cea7497da7be2955d333bd3f800b9 caused a regression in that the arm reg cmd no longer worked. The issue was caused because we changed the value of ARM_MODE_THREAD which was being checked in arm_init_arch_info. Change-Id: Id571d4ab336d1b0e2b93363147af245d24b65ca5 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1362 Tested-by: jenkins Reviewed-by: Luca Bruno <lucab@debian.org> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28build fix: ft2232Oleksij Rempel
fix build with-ftd2xx-lib Change-Id: I4a9b5d204c29b7a0714a59494b2b5f959c73f99b Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/1359 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28gdb server: Fix bug. Parse 'M' packet error.Hsiangkai Wang
The format of 'M' packet is 'M addr,length:XX...'. The data follows ':' immediately. No need to '+2' to SEPARATOR in unhexify(), because SEPARATOR points to data correctly. Change-Id: I15b5758b540816cc727752e7bf68cd45e623f603 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1360 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-22Update NEWSSpencer Oliver
Change-Id: Icfc1245552a400232988cf44f54e5c46af1db873 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1356 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-21Restore -dev suffixFreddie Chopin
Change-Id: I3662c5993766a76d6dd62b919c56cc059c4e50d4 Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21The openocd-0.7.0-rc1 release candidate.v0.7.0-rc1Freddie Chopin
Change-Id: I2992c31b56b88062cdd8a8208506a61f6367fcbf Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21Add "lpc1800" alias for "lpc4300" flash driverFreddie Chopin
Change-Id: I6d2bb9105cc778bd1d21580022529d684c3b21b0 Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/1351 Tested-by: jenkins
2013-04-21flash/nor: add lpc4300 variant to lpc2000 driverMatt Dittrich
This patch adds flash programming support for internal flash of the LPC43x2/3/5/7 part, tested on a LPC4337 (also tested on a LPC1768 and LPC2468). It should also work with LPC1800's with onchip flash. The "base" parameter of the "flash bank" command is now significant for the lpc4300 variant and required to determine the bank number parameter needed by the IAP routines. NOTE: I could only program flash successfully when the chip is powered with "P2_7" pulled low to put it in ISP mode. When running from flash (and not the ISP ROM), the target fails to halt and the sector erase fails. This is similar to the behavior I remember when trying out the spifi driver on a LPC4350... lots of power cycles to make progress, one To burn, one to run. So I am not confident my config is set up correctly. Change-Id: I8a75ef1b95cedd5b5898b2dedff477f502fd19f3 Signed-off-by: Matt Dittrich <mdittrich.dev@gmail.com> Reviewed-on: http://openocd.zylin.com/1126 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins
2013-04-21Improve HACKINGFreddie Chopin
Reword info about creating SSH key - it's not required to add it to Github account. Mention adding created SSH key to Gerrit account - without this step it's not possible to access Gerrit in further steps. Change-Id: Ibd81521fbe47d4b4beae0b77cdc9d939fd3ee20c Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/1350 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-04-21telnet: add telnet history supportSpencer Oliver
adapted from Yoshinori Sato's patch: https://github.com/ysat0/openocd/commit/2f07f4600a0da8206612d78c159bbe1171aa41c2 Change-Id: I084b86d316b0aa6e9593f007c024961dbda805e9 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1310 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21Support newer OSBDM firmwareR. Steve McKown
OSBDM: add new VID:PID implemented in OSJTAG/OSBDM firmware somewhere between versions 30.13 and 31.21. PFLASH programming works with this patch, tested on a Freescale Kinetis TWR-K20D72M using its onboard OSBDM JTAG adapter. Note: flash program testing required hacking kinetis_write() to force longword programming, as the FTFL program section commands formulated by kinetis_write() currently fail on this board's PK20DX256VLL7 processor. Change-Id: Ib7b92ff2fe9ebf6158fb1489f554a19e96cd9651 Signed-off-by: R. Steve McKown <rsmckown@gmail.com> Reviewed-on: http://openocd.zylin.com/1348 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-21stm32f30x: Add boundary scan TAP ID to match siliconAndreas Fritiofson
Change-Id: I74ef3cfc437540aedd99da46ac3e0c6cd9c5cd8d Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1354 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20mips: m4k alternate pracc code. Patch 4Salvador Arroyo
Now all the functions with only fetch accesses are modified. The same delay between scans has been added to mips32_pracc_fastdata_xfer(), it should work at the same scan rates as the other pracc functions, but it needs higher scan_delays to work. Change-Id: Ifb31d8ea6de9d22674385782913d221a2494dbbf Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1196 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20mips: m4k alternate pracc code. Patch 3Salvador Arroyo
Functions mips32_pracc_read_mem(), mips32_cp0_read() and mips32_pracc_read_regs() are now modified. mips32_cp0_read() is very similar to mips32_read_u32() with one store access. mips32_pracc_read_regs() is the only function that can not be executed from only one queue. Now this function is modified to use reg8, it saves all the registers but does not restore reg8. To remedy this, mips_ejtag_config_step() is called after mips32_save_context() in mips_m4k_debug_entry(). Function mips_ejtag_config_step() is modified to use reg8 and restore it from ejtag info instead of using DeSave for save/restore. Change-Id: Icc224f6d7e41abdec94199483401cb512cc0b450 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1195 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20mips: m4k alternate pracc code. Patch 2Salvador Arroyo
Each pracc function defines a variable ctx of type struct pracc_queue_info. To simplify the code tree auxiliary functions are defined: pracc_queue_init(), pracc_add() and pracc_queue_free(). The second parameter in pracc_add() is the store address if the instruction is a store at dmseg, otherwise it should be 0. The code is executed by mips32_pracc_queue_exec(). If ejtag_info->mode is 0 mips32_pracc_exec() is called and it should work like with current code. To generate the delay between scans the number of clock ticks are calculated with the help of jtag_get_speed_khz(). Due to delays in the execution of each single ftdi instruction the number of ticks are higher as it should be, specially at higher scan rates. mips32_pracc_read_u32() should now work with the new code. Change-Id: I471590a4fc89b56af10bd46c48767b4c64de154f Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1194 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20mips: m4k alternate pracc code. Patch 1Salvador Arroyo
This patch and the following patches define another way of doing processor access without the need to read back the pracc address as needed in current pracc code. Current pracc code is executed linearly and unconditionally. The processor starts execution at 0xff200200 and the fetch address is ever incremented by 4, including the last instruction in the delay slot of the branch to start. Most of the processor accesses are fetch and some are store accesses. After a previous patch regarding the way of restoring registers (reg8 and reg9), there are no load processor accesses. The pracc address for a store depends only on the store instruction given before. m4k core has a 5 stage pipeline and the memory access is done in the 3rth stage. This means that the store access will not arrive immediately after a store instruction, it appears after another instruction enters the pipeline. For reference: MD00249 mips32 m4k manual. A new struct pracc_queue_info is defined to help each function in generating the code. The field pracc_list holds in the lower half the list of instructions and in the upper half the store addressess, if any. In this way the list can be used by current code or by the new one to generate the sequence of pracc accesses. For every pracc access only one scan to register "all" is used by calling the new function mips_ejtag_add_scan_96(). This function does not call jtag_execute_queue(), all the scans needed can be queued before calling for execution. The pracc bit is not checked before execution, is checked after the queue has been executed. Without calling the wait function the code works much faster, but the scan frequency must be limited. For pic32mx with core clock at 4Mhz works up to 600Khz and with 8Mhz up to 1200. To increase the scan frequency a delay between scans is added by calling jtag_add_cloks(). A time delay in nano seconds is stored in scan_delay, a new field in ejtag_info, and a handler is provided for it. A mode field is added to ejtag_info to hold the working mode. If a time delay of 2ms (2000000 ns) or higher is set, current code is executed, if lower, new code is executed. Initial default values are set in function mips32_init_arch_info. A reset does not change this settings. Change-Id: I266bdb386b24744435b6e29d8489a68c0c15ff65 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1193 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-20Improve clone command in READMEFreddie Chopin
Without the explicit dir at the end the repository will be cloned to "code". Change-Id: Icd8b55b4ba74f23b214c3844e2fb785377768119 Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-on: http://openocd.zylin.com/1349 Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Tested-by: jenkins
2013-04-19stm32w: Added sample target configuration for STM32W108 with STLink-V2Ben Nahill
As requested, here is the target configuration that I'm using for an STLink-V2-attached STM32W108C8. For some reason, it only seems to work with "reset_config trst_only". Change-Id: Icbff4f83343e1f505d8afdfc53ff6f8b7496cac9 Signed-off-by: Ben Nahill <bnahill@gmail.com> Reviewed-on: http://openocd.zylin.com/1347 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-17topic: STM32W support added to em357 driverBen Nahill
The em357 driver only supported one page configuration (192k in 96 2048k) pages. This is fine for em357 chips since that's the size they have, but ST's STM32W chips (pretty much the same) have different flash configurations available (64, 128, 192, 256k). I can't find anywhere that would indicate the size of the chip anywhere in memory so the selection must be manual, using the 'size' parameter. For backwards compatibility, any size not known to be in use defaults to the 192k configuration. I don't have any em357 devices to test, but I also found that I had to re-assert the FPEC clock enable before performing an erase. This is a single line and shouldn't break any configurations. My testing so far has only been with a 64k device with 8k of RAM. Change-Id: Ic0ac400a9696efaa09d1407dd4a4d456bc2c318b Signed-off-by: Ben Nahill <bnahill@gmail.com> Reviewed-on: http://openocd.zylin.com/1336 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-17program: do not poll target after reset runSpencer Oliver
Disable polling the target before we issue a 'reset run'. This stops errors or warnings if the target disables the SWD or JTAG interface as part of the application code. Change-Id: I5019dffdad41a8e210003ece1caf89069ee0f223 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1331 Tested-by: jenkins
2013-04-17stlink: fix connect under reset issuesSpencer Oliver
We need to make sure that srst is asserted before we attempt to switch into jtag or swd mode otherwise we receive a error (-9) - invalid device id. Change-Id: I625166c751cfba8e8a5290f40122bb9afc9dbb39 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1315 Tested-by: jenkins
2013-04-17parport: fix parport_toggling_time regressionSpencer Oliver
If parport_toggling_time is called before the adapter speed has been configured then the call fails. Probably not the best fix, but does at least enable parport_toggling_time to be used again. This regression was added in commit 740b9e25b410c164e661d0334a9ea4168406726b Change-Id: I90300916d6bda5ef053c557e5ac136c4f002bdd1 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1309 Tested-by: jenkins
2013-04-17ft2232: remove ft2232_large_scan memory leakAndreas Fritiofson
This is a very long outstanding issue see: http://lists.berlios.de/pipermail/openocd-development/2011-June/019404.html As this driver is deprecated the fix is added to purely to reduce the warnings reported by clang. Change-Id: I3a16a704e0e8db27efda50fdcfdd35abf5ebed0f Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1278 Tested-by: jenkins
2013-04-17libusb: disable debug messages by defaultSpencer Oliver
Change-Id: I15dec0f521502139b57adaff576516af7883a74b Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1314 Tested-by: jenkins
2013-04-17jimtcl: update embedded jimtclSpencer Oliver
Update to latest jimtcl commit 2c1eba991e21a6f0b531fb0f83e21f9e6ee7c515. This fixes issues when building on certain versions of Mac OSX. Change-Id: I551477752d7913c84e6deb60b889d0c14bd200a0 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1311 Tested-by: jenkins Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2013-04-15cfg: Added cfg script for at91sam4sd32x targetsPeter Dietzsch
Change-Id: I3b8a54d89a180bfded3dae3f1fe3d940540e6e7d Signed-off-by: Peter Dietzsch <peter.dietzsch@ib-dt.de> Reviewed-on: http://openocd.zylin.com/1333 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-15flash: Added support for at91sam4sd32cPeter Dietzsch
Change-Id: I7223980602d7595a3dd7a3ceaac3f58d4f73f88d Signed-off-by: Peter Dietzsch <peter.dietzsch@ib-dt.de> Reviewed-on: http://openocd.zylin.com/1332 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2013-04-11ft2232: fix input scan ending in drshift/irshiftYann Vernier
The final bit was incorrectly added as output data, even if no data was to be written. Changed it to match handling of other bits. Change-Id: I91e5ba0c932876bfb579c22e6c7ef0300baa1534 Signed-off-by: Yann Vernier <yann.vernier@orsoc.se> Reviewed-on: http://openocd.zylin.com/1049 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-11arm_adi_v5: fix for csw nonsecure access.Michel JAOUEN
Add command to fix CSW_SPROT in register AP_CSW. This solves dap apmem access in non secure access. Change-Id: I7cfcb6434d75f5cfd4a2630a059901cdeea010ce Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com> Reviewed-on: http://openocd.zylin.com/1276 Tested-by: jenkins Reviewed-by: mike brown Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02mips: code cleanup in cp0 command handlersSalvador Arroyo
After calling mips32_cp0_read() nothing has been queued, the call to jtag_exec_queue() is unnecessary. Change-Id: Ie25438045a8e9b6b1b170df7b52609d45f284b5a Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1190 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02mips: change in restoring debug working registerSalvador Arroyo
In current devel code there are 3 functions (related to m4k code) that need to restore register 8 from pracc stack: mips32_pracc_read_u32() mips32_cp0_read() mips32_pracc_write_mem_generic() And mips32_pracc_read_mem() needs to restore regs 8 and 9 from pracc stack. Values in this registers should be the same as read by mips32_pracc_read_regs() when entering debug mode and can be modified by mips32_pracc_write_regs() when leaving debug mode. There is no need to read their values from the processor registers every time. The fields reg8 and reg9 are added to struct mips_ejtag to store these register values and the call to mips32_save_context() is shifted in mips_m4k_debug_entry() in order to store them before any other function needs to restore these registers. For the same reason in function mips_m4k_step() the call to mips_m4k_set_breakpoint(), if needed, should be made after calling mips_m4k_debug_entry(). For single word write the number of pracc accesses are now 9 or 8, from 13 or 12 in current code, single word read takes now 10 instead of 12. This patch is really the first in a set of patches for an alternate m4k pracc code much faster that current code. At least for me with pic32mx works fine. Change-Id: Ibd9df5e8b9f78ce05a180949ba6a561c761b61d6 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1146 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02mips: mips32_pracc_fastdata_xfer() little modificationSalvador Arroyo
In this function after loading the handler code and the jump code there is a call to wait_for_pracc_rw() to verify that a pracc access is pending. Next the address is read to verify that the handler is running, the address should be at fastdata area. Next, another call is made to wait_for_pracc_rw(). This call is not needed, we now already that a pracc access is pending. Better we call this function before loading the end address to be sure it is loaded correctly. Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Change-Id: If311450ea634786fc28cf1a8e18ed24ce5257d20 Reviewed-on: http://openocd.zylin.com/1142 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02pic32mx: 0 wait state optionSalvador Arroyo
By default pic32mx starts after any reset with 1 wait state for RAM access/exec. It can be changed to 0 wait states by clearing the BMXWSDRM bit (bit 6) in BMXCON register. With 0 wait states near doubles the execution speed. CRC check sum can be done much faster increasing verify_image speed. Fast data transfer also works with a bit higher scan rate, up to 1500 Khz. This option can be set at any time with mww 0xbf882004 0x40 or cleared with mww 0xbf882008 0x40. Some numbers for FTDI/HS with current devel code and a elf file: Core clock / wait states verify_image speed ------------------------------------|------------------------------ 4 Mhz / 1 21 KiB/s 4 Mhz / 0 36 KiB/s 8 Mhz / 1 37 KiB/s 8 Mhz / 0 57 KiB/s Change-Id: I4092ad0f3753f72f77108718d0ed3a3ab84e3b23 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1141 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2013-04-02pic32mx: false pending at low core clockSalvador Arroyo
To show up the fail try to step with the core clock set to 31.25Khz and with a ftdi/hs adapter or with a wiggler, -not with ft2232-. The scan frequency should be set to 300Khz or higher, at lower frequency probably will not fail. The code exits with error because the pracc address is at 0x0. It also fails when using the "all" register, but in this case the code works without any message because the pracc address is at 0xff202004 when it fails. I never saw this fail with the core clock set to 500Khz or higher, but ... The workaround simply puts a 1 ms delay after the execution of the DERET instruction. Change-Id: I38e8c01a9c39aedd3282140543b83a0844d8ad29 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/1139 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-02Added support for ARMv7-M in arm io.Henrik Nilsson
Added support for ARMv7-M targets in arm_nandwrite and arm_nandread. Change-Id: Iab1d78d401f735e191c6a8519f3619035a300fae Signed-off-by: Henrik Nilsson <henrik.nilsson@bytequest.se> Reviewed-on: http://openocd.zylin.com/1188 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-02Add abort when JTAG-DP transaction times out.Evan Hunter
Fixes system hang for devices that don't ignore transactions to bad addresses. Change-Id: Ia98344d7efc12951ef79dbc82b8f792b70a22cee Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/1115 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-11-21 16:16:33 +0000