aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2015-10-30quark: updating license to GPLv2+Ivan De Cesaris
Intel is relicensing our contributions to OpenOCD under GPL version 2 or any later version. We previously contributed code under GPL version 2 only. It was not our intention to differ from the standard OpenOCD license. We're correcting that here. This also applies retroactively to previous versions of our contributions to OpenOCD. Change-Id: I5e831ed95d03d2044d8e5a8375b21c6e52c933d7 Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com> Reviewed-on: http://openocd.zylin.com/3044 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-10-30tcl/board: Add Diolan LPC4357-DB1 configAndreas Färber
Adapted from diolan_lpc4350-db1.cfg. Both boards are identical except for the SoC, so keep them in sync. Change-Id: If892d8e953b0e3a9209a95b3b23a547357c10b7a Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3038 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Add LPC4357 configAndreas Färber
Reuse the flashless LPC4350 as base and amend it as necessary. The LPC43x7 have 2x 512 KB of flash. Change-Id: Ia7ffbc7101023479971984b839f171ed4be6b089 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3037 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30docs: added note for increasing gdb remotetimeout when using the "gdb_port ↵fenugrec
pipe" command. Change-Id: I9c9514a193fd65454890571a17373b9c64d84757 Signed-off-by: fenugrec <fenugrec@users.sourceforge.net> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3040 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30doc: Fix sort order of flash driversAndreas Färber
fm3, nrf51, mdr, sim3x were at the end of the section rather than inserted alphabetically. Fix this before adding further drivers. Change-Id: Id23e04749cdd3b25d7503ec00fac554742d48c77 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3019 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30tcl/board: Add Spansion SK-FM4-U120-9B560 configAndreas Färber
Change-Id: I01464b2a999890d50b95d0fb98ff46d8a04a2c57 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3009 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30Cortex-M: Detect Flash Patch Revision and implement Rev. 2 handling.Uwe Bonnes
E.g. STM32F7 implements Rev.2. Supercedes abandoned patch 2755 that doesn't evaluate Flash patch revision. Change-Id: I48756b0451c7359475066969c900978a536bc328 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2868 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30fm4: Add JTAG supportAndreas Färber
Add support for the JTAG TAPID found on SK-FM4-U120-9B560-MEM V1.1.0 board. Change-Id: Idbfe28927e0c549f0c89c29904d23971281927c9 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3039 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Prepare FM4 MB9BFxxx familyAndreas Färber
It is found on the SK-FM4-U120-9B560-MEM V1.1.0 among others. Change-Id: I4c708c9391e954cbbc8d0860a2a2dbd264aea865 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3008 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30fm4: Split out S6E2CC family configAndreas Färber
Its memory layout is different from MB9BFxxx. Change-Id: I39c9f9cf582cd182971a9f83bb88c7a18da6cf15 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3007 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/board: Add Arndale configAndreas Färber
Tested with Olimex ARM-USB-OCD-H adapter. Change-Id: I1bf68176f9c155f8803df5a10a7fbe03116c6309 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3081 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Add Exynos5250 configAndreas Färber
Change-Id: Ia673d3f16b2238d5af8fbeff2d57c6cf27dcffb1 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3080 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/board: Add config for XMOS xCORE-XA Core Module ARM debuggingAndreas Färber
The xCORE-XA Core Module board has an XS1-XAU8A-10 SoC with 8 xCORE cores and one ARM core. This config is for the ARM Cortex-M3, via J-Link OB. Tested with "J-Link OB-STM32F103 V1 compiled Feb 5 2014 13:48:52". Change-Id: Id7fadf8f323b45d5cfc0cae1054bd7b916771d6a Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2763 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-30tcl/target: Add config for XMOS XS1-XAU8A-10's ARM coreAndreas Färber
The XS1-XAU8A-10 has 8 xCORE cores and one ARM core. This config represents the ARM Cortex-M3 core, which is apparently Silicon Labs EFM32 Giant Gecko IP. Change-Id: I998360f096c759d2e274d96c1ca2e0450ba61146 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2762 Tested-by: jenkins Reviewed-by: Oleksij Rempel Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-30tcl/board: Add Digilent Analog Discovery configForest Crossman
Change-Id: Idf2cb8d8578e650fda4082f6bbf272518762ebf0 Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/2752 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
2015-10-21tcl: Support for reading "Device DNA" from Spartan 6 devices.Tim 'mithro' Ansell
Most Xilinx FPGA devices contain an embedded, unique device identifier called the "Device DNA". The identifier is nonvolatile, permanently programmed into the FPGA, and is unchangeable providing a great serial / tracking number. Debugging was done in https://github.com/timvideos/HDMI2USB/issues/36 Change-Id: Iad03eafb40887f0321a4dc22858a7c3bf37a12b3 Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com> Reviewed-on: http://openocd.zylin.com/2960 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-21tcl: Adding the Numato Opsis board.Tim 'mithro' Ansell
Another board supported by the ixo-usb-jtag project. Change-Id: I676197c64e208886bc03d1bafcc964ef1fc2160b Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com> Reviewed-on: http://openocd.zylin.com/2963 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-21tcl: Adding the Digilent Atlys board.Tim 'mithro' Ansell
The board is supported via the ixo-usb-jtag firmware. Change-Id: I1e8a5ead850c0843b8532a5b54a7e7117778278e Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com> Reviewed-on: http://openocd.zylin.com/2962 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-21tcl: Setting lowlevel driver for ixo-usb-jtagTim 'mithro' Ansell
Also add further documentation about the project and how to use it. Change-Id: Ia9878de566b3c8c1ea29f129287d5aea904d861d Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com> Reviewed-on: http://openocd.zylin.com/2961 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-09nrf51: recognize hwid 0084Peter A. Bigot
Chip markings: N51822 / QFACA1 / 1513AN Change-Id: Idb7fc723850ea08b60b9f5c97a53f1ae8dfc8eb2 Signed-off-by: Peter A. Bigot <pab@pabigot.com> Reviewed-on: http://openocd.zylin.com/2936 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-09Kinetis: new devices K02, K26, K63, K64, K66, correct K21 and K22 variantsTomas Vanek
K22FN1M0 and K22FX512 has FTFE flash and old style SDID. K22FN128, 256 and 512 has FTFA flash and new style SDID K63 and K64 detects as K61 and K62, see Errata 1N83J e7534 Change-Id: I2aca6f1f18819bb2b2ec4982036510de444ad2ac Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2867 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Patrick Stewart <patstew@gmail.com>
2015-10-09Kinetis: give a reasonable default for max_flash_prog_sizeTomas Vanek
max_flash_prog_size euals to pflash_sector_size_bytes for most of devices. There is no point setting max_flash_prog_size for devices without FS_PROGRAM_SECTOR capability. Check for zero sector_size to avoid div by zero exception in case of device has FlexNVM but the driver does not define nvm_sector_size_bytes Change-Id: Iaf4e007fb1ec3d24c373350410e4bebe504a4c3e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2958 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Patrick Stewart <patstew@gmail.com>
2015-10-09Kinetis: Add K24 support and tidy upPatrick Stewart
The K24 uses the KL-style SDID register and has some flashing quirks, so the kinetis driver does not support it properly. Extend the chip detection routine to support the new SDID format. Add a parameter for the maximum flash size, as the K24 only supports 1k flashing blocks but has 4k sector size. Remove global 'granularity' array, as it's only really needed in one function. Replace 'klxx' with an enum showing which flash commands are actually supported on a given chip. Signed-off-by: Patrick Stewart <patstew@gmail.com> Change-Id: Ie244fab564d58c5cfe4fa36a025f0b2674ffad69 Reviewed-on: http://openocd.zylin.com/2864 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-09-30flash/nor/spi: Add Winbond w25q128fvAlex Forencich
Change-Id: I2e13c02361982468f41f218421ece9046bcc9a5f Signed-off-by: Alex Forencich <alex@alexforencich.com> Reviewed-on: http://openocd.zylin.com/2951 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30ADIv5: Fix typo in log messageEvan Hunter
Change-Id: I9c5e648566b1dd43cb55fd5e30edf8d5f0d189a6 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/2892 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30stlink_usb: fix typoJim Paris
Change-Id: I3cf5ced568319878b8bf40743e4c07718f630c68 Signed-off-by: Jim Paris <jim@jtan.com> Reviewed-on: http://openocd.zylin.com/2953 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30armv7m: Fix memory leak in register caching.Marc Schink
Change-Id: I184042d277a52f3940d6d6c13f3d94afc557933d Signed-off-by: Marc Schink <openocd-dev@marcschink.de> [andreas.fritiofson@gmail.com: don't check pointers before free()] Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2881 Tested-by: jenkins
2015-09-30numicro: Integrate Nuvoton NuMicro flash driver.Nemui Trinomius
Flash driver "mini51.c" and "nuc1x.c" are same target MCU. This patch integrates each driver and functions, and makes into new "NuMicro" flash driver. Change-Id: Ifff5c1cfdd265acca0f489631695be9194fa144c Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp> Reviewed-on: http://openocd.zylin.com/2794 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30flash: Analog Devices ADuCM360 supportIvan Buliev
A target config and a simple flash driver for the ADuCM360 microcontroller. The EEPROM of the chip may be erased and programmed. Change-Id: Ic2bc2f91ec5b6f72e3976dbe18071f461fe503b8 Signed-off-by: Ivan Buliev <i.buliev@mikrosistemi.com> Reviewed-on: http://openocd.zylin.com/2787 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: jenkins
2015-09-30tcl/board: Add Parallella-I board configAndreas Färber
Tested with Porcupine-1 JTAG adapter board and Digilent JTAG-HS3 interface; reset does not yet work, pending nSRST configuration of the interface used. Change-Id: I0d0679e098d93ffbd1539004cdb900e2a8ae4a25 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2730 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30zynq_7000: Add expected IDAndreas Färber
As found on the Parallella-I board SKU A101020. Change-Id: Ie7e7a36325926d67fbe555b46a9be8a74fac8dba Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2729 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30tcl/interface/ftdi: Add Digilent JTAG-HS3 configAndreas Färber
Derived from tcl/interface/digilent-hs1.cfg. JTAG-HS3 has an open drain buffer on pin 14 for SRST to work with PS_SRST_B on Xilinx Zynq SoC. Change-Id: I1e9e72d0511528a61207e318aff937ae9fad5bf9 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2728 Tested-by: jenkins Reviewed-by: Robert Jordens <jordens@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-09-30svf: fix segfaults exposed by some SVFPaul Fertser
The problem was reported by jstefanop on IRC, the SVF was generated with Xilinx ISE 14.7. Found and investigated with Valgrind's vgdb service. Change-Id: I32b0e77e0380ce4a391661f97449f9c2a5f83625 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2933 Tested-by: jenkins
2015-09-30tcl_server: Support line buffers up to 4M (v3)Philipp Wagner
Currently, the maximum size of a command sent to the TCL server is 4k. This patch increases this limit up to 4M. Reasoning: To get high-speed JTAG data transfers, I'm using a very long shift register. This reduces the overhead of the state changes, as well as the latency due to the common USB adapter transfers considerably. In order to submit those long DRSCAN commands to OpenOCD over the TCL/TCL interface, long TCL command lines are required. This is enabled by this patch. v3: Address review comments. Drop line instead of connection when realloc() fails. Changes in v2 of this patch: The line buffer is allocated dynamically to avoid an OpenOCD memory overhead if the large buffers are not used. The buffer starts at 4K and increases exponentially up to 1M, and then linearly in 1M increments up to 4M. Change-Id: Iecaef6a56ed5e18e9de4d912a514031ea78fa3bd Signed-off-by: Philipp Wagner <philipp.wagner@tum.de> Reviewed-on: http://openocd.zylin.com/2837 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-09-28server: remove connection limit from tcl and telnet serversAustin Morton
Add constant CONNECTION_LIMIT_UNLIMITED which indicates a service has no connection limit Change-Id: I008d31264010c25fa44ca74eb6d5740eca38bee1 Signed-off-by: Austin Morton <austinpmorton@gmail.com> Reviewed-on: http://openocd.zylin.com/2937 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-09-05server: tcl_trace commandAustin Morton
Implements async target trace output to the tcl server Change-Id: I0178f6404447337d523782a1d2c317457030da40 Signed-off-by: Austin Morton <austinpmorton@gmail.com> Reviewed-on: http://openocd.zylin.com/2588 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-08-19flash/nor/jtagspi: 'retval' may be used uninitializedAlamy Liu
Problem As my compiler has "warnings being treated as errors" on, it shows the error message: error: 'retval' may be used uninitialized in this function Investigation Nothing wrong with the logic, 'retval' would have a value before returning. Just wanna get rid of the compiling "warning as error" message. Solution Provide a reasonable default value Change-Id: I712c15f82819c6c48bee9dceca8de4b18aeb29b0 Signed-off-by: Alamy Liu <alamy.liu@gmail.com> Reviewed-on: http://openocd.zylin.com/2905 Tested-by: jenkins Reviewed-by: Robert Jordens <jordens@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-08-06svf: flush the queue before reallocing memoryPaul Fertser
During reallocation a new memory region might be allocated and the old one freed. If jtag queue is holding a pointer to the old memory, it will segfault during the execution. Avoid this by flushing the queue before a reallocation attempt is made. This should fix ticket #102. Change-Id: I737fc3f1ebf6d76413a475beb8bf20184fe0233f Reported-by: Alex Forencich <aforencich@users.sf.net> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2899 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-08-06flash : Add support for Atmel at91sam4sa16bEvan Hunter
Change-Id: Ief6833b4bf587fbf53c8fbeee2fc276a95ca0a8a Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/2878 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06gdb_server: Add check for malloc failEvan Hunter
Change-Id: I623b30883042eae3253ed29de5c426da760dffa0 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/2871 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06bcm2835gpio: Add SWD support, Raspberry Pi 2 support.Christoph Pittracher
Added support for SWD transport similar to sysfsgpio driver. Added configurable peripheral base address to support Raspberry Pi 2. Change-Id: If76d45fbe74ce49f1f22af72e5f246e973237e04 Signed-off-by: Christoph Pittracher <pitt@segfault.info> Reviewed-on: http://openocd.zylin.com/2802 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06at91samd: add chip IDs for SAMC20 and SAMC21 familiesAndrey Yurovsky
Add the chip IDs corresponding to the new 5V "SAMC" parts which are otherwise identical to the SAMD and should work with this driver. Also add the configurations for their Xplained Pro boards. Change-Id: Ic268d4ac384a3a77d4211a94da9f9faf4d8c0f7b Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com> Reviewed-on: http://openocd.zylin.com/2809 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06sim3x: fix build failure with clang 3.6Paul Fertser
This fixes a warning as reported by the current clang version: ../../../../src/flash/nor/sim3x.c:867:20: error: address of array 'sim3x_info->device_package' will always evaluate to 'true' . Change-Id: Ie160cbe6df8f491e9beff38d47e2f13575529bf9 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2838 Tested-by: jenkins Reviewed-by: Oleksij Rempel Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06kc705: digilent-jtag/kintex7/jtagspi boardRobert Jordens
Xilinx Kintex7 Development board with integrated Digilent JTAG-SMT1 (a.k.a. HS1) interface and a 128 MBit SPI flash. Change-Id: I9daba0a2fb2c17e04bcb37bd41872ebde25e0d2f Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2861 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06pipistrello: ftdi-jtag/spartan6/jtagspi boardRobert Jordens
The Pipistrello is a low cost FPGA board with a Xilinx Spartan6 LX45, a SPI flash and onboard FTDI JTAG. This board is a good example use case for the jtagspi flash driver talking through a proxy bitstream. Change-Id: I04a80610ff825c36ebcb67b879507028eed141ad Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2846 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06flash/nor/jtagspi: add JTAGSPI driverRobert Jordens
Many FPGA board speak JTAG and have a SPI flash for their bitstream attached to them. The SPI flash is programmed by first uploading a proxy bitstream to the FPGA that connects the JTAG interface to the SPI interface if the IR contains a certain USER instruction. Then the SPI flash can be erase, written, read directly through the JTAG DR. The JTAG and SPI signaling is compatible. Such a proxy bitstream only needs to connect TDO-MISO, TDI-MOSI, TCK-CLK, and the activate the chip select when the IR contains the special instruction and the JTAG state machine is in the DR-SHIFT state. Change-Id: Ibc21d793a83b36fa37e2704966aa5c837c4dd0d2 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2844 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06flash/nor/tcl: add read_bank and verify_bankRobert Jordens
The only read access to flash chips so is through the target's memory. Flashes like jtagspi do not expose a memory mapped interface to the flash. These commands use the flash_driver_read() driver API directly. Change-Id: I40b910de650114a3f676507f9f059a234377d862 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2842 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06cpld/virtex2: allow JSTART to be disabledRobert Jordens
This adds an option to disable the use of the JSTART instruction when loading bitstreams to xilinx fpgas. JSTART apparently prevents configuration if the startup clock is not set to the jtag clock in the bitstream. xc3sprog is omitting JSTART for all devices. Problems with loading a bitstream that does not have StartupClk:JTAGClk are described here: http://www.xilinx.com/support/answers/56151.html Change-Id: I8137c0bae05a8c3c6f8e2611869f70a770d1651d Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2860 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06flash/nor/spi: add micron/numonyx n25q128Robert Jordens
http://www.micron.com/products/nor-flash/serial-nor-flash https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_128mb_3v_65nm.pdf Signed-off-by: Robert Jordens <jordens@gmail.com> Change-Id: Icfb830387fabfb1a67e4d00bdf21a10420f6fc1c Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2841 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06target/testee: manage target->stateRobert Jordens
The testee target is usefull for certain non-cpu pass-through situations, for example in the case of a spi flash mapped to the DR of a JTAG tap, as is the case for most FPGAs with SPI flashs behind them. We just manage the RUNNING/RESET/HALTED state in the testee driver to support it being halted which is a requirement for flash banks. Change-Id: I1b4d52c58a1f6bd753e126bfde74dcc5164d7b69 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2840 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-17 14:22:13 +0000