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2015-11-10flash: driver for Atmel SAMV, SAMS, and SAMEMorgan Quigley
This is a driver for the Atmel Cortex-M7 SAMV, SAMS, and SAME. I started with the at91sam4.c driver and then restructured it significantly to try to simplify it and limit the functionality to just a flash driver, as well as to comply with the style guide. Change-Id: I5340bf61f067265b8ebabd3adad45be45324b707 Signed-off-by: Morgan Quigley <morgan@osrfoundation.org> Reviewed-on: http://openocd.zylin.com/2952 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2015-11-10tcl/board: add Atmel SAM V71 Xplained UltraMorgan Quigley
Tested with cmsis-dap using the EDBG chip on the board. Change-Id: I3d398685c81e4701a9f6c1a66e60f7a87f839daa Signed-off-by: Morgan Quigley <morgan@osrfoundation.org> Reviewed-on: http://openocd.zylin.com/3092 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-10tcl/target: add config for Atmel SAMV / SAMS / SAMEMorgan Quigley
Change-Id: Ia90a533fe3d07f9a67ce2da815146c612d80dd1b Signed-off-by: Morgan Quigley <morgan@osrfoundation.org> Reviewed-on: http://openocd.zylin.com/3091 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2015-11-10cfi: Fix fallback to memory writesEsben Haabendal
Change-Id: I2d09139b95ff62c62a0b071584e85a87494ed313 Signed-off-by: Esben Haabendal <esben@haabendal.dk> Reviewed-on: http://openocd.zylin.com/3095 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-07target: cortex_a: do not create new register cache every resetPaul Fertser
Commit 68101e67ac16bdead3bd6d48cbe0a2bfd63aac02 introduced a regression which resulted for ever-growing registers list (as output by "reg" command), its contents were doubled every reset (actually, every examination). Change-Id: Ie3409c795160a2fc840a5e8a892928df0bcc0c57 Reported-by: Daniele Emancipato <daniele12457@hotmail.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3100 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-07Cortex A/R : Allow interrupt disable during single-stepEvan Hunter
Example usage: cortex_a maskisr on cortex_a maskisr off cortex_r maskisr on cortex_r maskisr off Change-Id: I799288d9b848a06f561ba29ec1eb8e5eeace5685 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/2876 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-07Documentation : Add missing commands for ARM-v7A & REvan Hunter
Change-Id: I520fed122385d4d666bf91b754b1ac196b51d471 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/2875 Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins
2015-11-05flash/nor/spi: Add GigaDevice gd25q16c/32c/128c flash supportMahavir Jain
Change-Id: I44052fd3467d7e0bbdc038b815204e39fa499684 Signed-off-by: Mahavir Jain <mjain@marvell.com> Reviewed-on: http://openocd.zylin.com/3029 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-05armv7a: correct calculation of ttbr0_maskMatthias Welwarsky
This patch brings the calculation of the address ranges handled by ttbr0 and ttbr1 registers in line with ARM DDI 0406C, Table B3-1 Change-Id: Ib807c4b1cb328a6f661e1a0898e744e60d3eccac Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3006 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-05armv7a: re-read ttb information if ttbcr changesMatthias Welwarsky
If ttbcr is changed after the debugger has examined a target for the first time, address translations may fail. This problem does not show up with Linux because it doesn't use ttbr1, but it shows with other OS that use this feature. If the debugger connects to the target while it's in u-boot, all address translations will fail after the OS has booted and the target can not be debugged. This patch reads the ttbcr in armv7a_mmu_translate_va() and compares it a cached value. If a difference is detected, armv7a_read_ttbcr() is called to re-parse the ttb configuration and update the cache. Change-Id: I1c3adf53ea9d748a0e1e3091d9581e5c43ed64e8 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3005 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-05tcl/target: Add configuration for NXP LPC4370 processorJim Norris
New configuration for NXP LPC4370 which consists of a Cortex-M4 and two Cortex-M0 cores. Change-Id: I9918e3ff33218a14a99e4bbab9dce2e7b45b4d96 Signed-off-by: Jim Norris <u17263@att.net> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2124 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-05tcl/board: Add LPC-Link2 configAndreas Färber
Tested with Olimex ARM-USB-TINY-H adapter (both JTAG and SWD). Change-Id: Idc8a030e9692eec761d1e2485cbf9897660c0ca0 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3082 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-05Kinetis: properly pad flash section writesTomas Vanek
kinetis_write() with byte count not divisible by prog_section_chunk_bytes computed wrong wc and therefore paded section chunk by some random data instead of 0xff Change-Id: Ic7c66d8a3ceacda9e611e98b9fbf943b8001774b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2994 Tested-by: jenkins Reviewed-by: Thomas Schmid <thomas@rfranging.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-05Kinetis: Disable watchdog on Kx devices when programming.Thomas Schmid
Kx devices with FTFA flash need the watchdog disabled when programming. I tried to keep overhead as small as possible and re-use registers that were already inquired (e.g. sim_sdid). Change-Id: Ibc29a26ec34102d78a6c3920dd16f63e134a8f6f Signed-off-by: Thomas Schmid <thomas@rfranging.com> Reviewed-on: http://openocd.zylin.com/2986 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-04Revert "board: don't hardcode interface for ti_beaglebone"Matthias Welwarsky
This reverts commit 7d7a43fd36a61e55e087a474fe41e3dae6375453. The change concerns the "Black" variant of the TI BeagleBone, while the configuration file is for the original BeagleBone board, which actually embeds a debug interface on the PCB. Change-Id: I2232af210deb698f8b3c0a547f26cd0a0a8f89d0 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3094 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-03helper/options: Use OPENOCD_SCRIPTS dir if set.Jonathan Larmour
This makes it easier to relocate the install tree of OpenOCD from where it was originally built (for example, if put onto a different machine), without having to change scripts or add something to the command line every time. Change-Id: Ia5edf0eba166f7a999f267bd6a92402dab9b399e Signed-off-by: Jonathan Larmour <jifl@eCosCentric.com> Reviewed-on: http://openocd.zylin.com/3004 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03tcl/target|board: add config Atheros ar2315Oleksij Rempel
Add configs for Atheros ar2313 MIPS based WiSoC and board based on this chip: La Fonera FON2200 Change-Id: Ibfdbfc9c2beca6cf436c9ee5e493b08bfb55ac85 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/2839 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03tcl/target|board: add config Atheros ar2313Oleksij Rempel
Add configs for Atheros ar2313 MIPS based WiSoC and board based on this chip: Netgear WP102 Change-Id: Id93957b5d5851a272f15be35f9f448a9ce6d8a08 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/2835 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03helper/options: Cleanup #includes.Marc Schink
Change-Id: I1c05cf6bb68049176cdd1b3bcff4dcb8b9ae963e Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2995 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03helper/log: Cleanup #includes.Marc Schink
Change-Id: Ie343524dd843d518086a86866391b5a34556082b Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2996 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03helper/ioutil: Rename MixedCaps function.Marc Schink
Change-Id: I10075d4d5f45a7105d5a007631510236dbb9b08b Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2957 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03helper/fileio: Fix memory leak.Marc Schink
The memory leak occurs when opening a file fails. It can be reproduced by using the "flash verify_bank" command with a filename that does not exist. Change-Id: I60b7b545c18793d750ff75d08124fde3f0aa6f64 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2998 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03helper/fileio: Use size_t for file size.Marc Schink
Change-Id: Ie116b44ba15e8ae41ca9ed4a354a82b2c4a92233 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2997 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03target: tell which target state is meantOleksij Rempel
If we work on smp system, the output of step command will depend on Id of default target. This patch adds additional information to help find what on which core is happening. Example of LOG after this patch. imx6.cpu.1: target state: halted ^^^^^^^^^^ target halted in ARM state due to breakpoint, current mode: Supervisor cpsr: 0x60000093 pc: 0x80076c0c MMU: enabled, D-Cache: enabled, I-Cache: enabled imx6.cpu.0: target state: halted ^^^^^^^^^^ target halted in ARM state due to debug-request, current mode: Supervisor cpsr: 0x20000193 pc: 0x802ccb6c MMU: enabled, D-Cache: enabled, I-Cache: enabled Change-Id: I536a2cce33b5ab10af9de2a43b9960320c17729f Signed-off-by: Oleksij Rempel <external.Oleksij.Rempel@de.bosch.com> Reviewed-on: http://openocd.zylin.com/2691 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-03cortex_m: dwt_num_comp should be set to zero in cortex_m_dwt_free()Tomas Vanek
A segmentation fault in cortex_m_endreset_event() is sometimes raised with very broken target like Kinetis Kx with erased flash and active WDOG. Debugging revealed that cortex_m->dwt_num_comp is 4 and dwt_list is NULL at cortex_m:290 Change-Id: I229c59d6da13d816df513d1dbb19968e4b5951e2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2989 Reviewed-by: Thomas Schmid <thomas@rfranging.com> Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-03lpc4350_spifi_generic: Clean up work area sizeAndreas Färber
Since 2cbbe9a it was actually decreasing the configured work area size. We could now do "set WORKAREASIZE 0x2000" before sourcing lpc4350.cfg, but there seems no point in doing so. Simply drop the configuration here. Change-Id: I25b9dbbc007ba652b66099832198b7c329929858 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3086 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-11-03rtos/mqx: Fix uninitialized parts of symbol tabledaniel-k
Memory for the symbol table was allocated by malloc but not initialized other than with the symbol name. Therefore `address` and `optional` members were having arbitrary values leading to every symbol being optional most of the time which messes up RTOS auto-detection. Memory will now be zero-initialized as in other RTOS implementations. Change-Id: I6c6e31ec1ef7e043061adf8c695b2139620e005d Signed-off-by: Daniel Krebs <github@daniel-krebs.net> Reviewed-on: http://openocd.zylin.com/3017 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-03lpc8xx: Allow CHIPNAME overrideAndreas Färber
Default to lpc8xx as before, but allow setting the actual CHIPNAME. Change-Id: I5a48fa75c640440a0d4c3f2858653e94bed846d2 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3084 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-11-03Change from sys/poll.h to standard poll.h locationPaul Fertser
According to "man 2 poll" the correct header to include is poll.h, not sys/poll.h. Reported by a build against musl. Change-Id: I5298b49dc947d1a368e423104c0c0c7b9bdd1a10 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2947 Tested-by: jenkins
2015-11-03tcl: add STM32F469 discovery board configMaxime Coquelin
Change-Id: Iad7ee06330b3259ea0ce0d174dfdade6785913eb Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Reviewed-on: http://openocd.zylin.com/3043 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-03flash/nor/stm32f2x: Add STM32F469 partMaxime Coquelin
Change-Id: I4e13ceb0ba954dc2fea059ddeef10109be938c9c Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Reviewed-on: http://openocd.zylin.com/3042 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-03board: don't hardcode interface for ti_beagleboneMatthias Welwarsky
Board files should not select the interface. The BeagleBone Black is not limited to just one JTAG interface. Change-Id: I71ccc3dd9e2ca331a436701fab04e548b0abf829 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3083 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30rtos: handle STKALIGN adjustments on cortex mAndrew Ruder
In the case that the STKALIGN bit is set on Cortex M processors, on entry to an exception - the processor can store an additional 4 bytes of padding before regular stacking to achieve 8-byte alignment on exception entry. In the case that this padding is present, the processor will set bit (1 << 9) in the stacked xPSR register. Use the new calculate_process_stack callback to take into account the xPSR register and use it on the standard Cortex_M3 stacking. Note: Change #2301 had some misinformation regarding the padding. On Cortex-M the padding is stored BEFORE stacking so xPSR is always available at a fixed offset. Tested on a Cortex-M0+ (Atmel SAMR21) board which has STKALIGN fixed to a '1' such that this alignment always occurs on non-aligned stacks. Behavior of xPSR verified via the (bad-sorry) assembly program below by setting a breakpoint on the SVC_Handler symbol. The first time SVC_Handler is triggered the stack was 0x20000ff8, the second time SVC_Handler is triggered the stack was 0x20000ffc. Note that in both cases the interrupt handler gets 0x20000fd8 for a stack pointer. GDB exerpt: Breakpoint 1, 0x000040b6 in Reset_Handler () (gdb) hbreak SVC_Handler Hardware assisted breakpoint 2 at 0x40f8 (gdb) cont Continuing. Breakpoint 2, 0x000040f8 in SVC_Handler () (gdb) print $msp $3 = (void *) 0x20000fd8 (gdb) x/9w $msp 0x20000fd8: 0x1 0x2 0x3 0x4 0x20000fe8: 0x88160082 0xa53 0x40ce 0x21000000 0x20000ff8: 0x0 (gdb) cont Continuing. Breakpoint 2, 0x000040f8 in SVC_Handler () (gdb) print $msp $4 = (void *) 0x20000fd8 (gdb) x/9w $msp 0x20000fd8: 0x1 0x2 0x3 0x4 0x20000fe8: 0x88160082 0xa53 0x40e8 0x21000200 0x20000ff8: 0x0 Assembly program: .cpu cortex-m0plus .fpu softvfp .thumb .syntax unified .section .vectors @ pvStack: .word 0x20001000 @ pfnReset_Handler: .word Reset_Handler + 1 @ pfnNMI_Handler: .word 0 @ pfnHardFault_Handler: .word 0 @ pfnReservedM12: .word 0 @ pfnReservedM11: .word 0 @ pfnReservedM10: .word 0 @ pfnReservedM9: .word 0 @ pfnReservedM8: .word 0 @ pfnReservedM7: .word 0 @ pfnReservedM6: .word 0 @ pfnSVC_Handler: .word SVC_Handler + 1 .section .text .global Reset_Handler Reset_Handler: cpsie i ldr r0, .stack_start ldr r2, .stack_last eors r1, r1 .loop_clear: str r1, [r0] adds r0, r0, #4 cmp r0, r2 bne .loop_clear subs r2, r2, #4 mov sp, r2 movs r0, #1 movs r1, #2 movs r2, #3 movs r3, #4 svc #0 ldr r0, .stack_start ldr r2, .stack_last eors r1, r1 .loop_clear2: str r1, [r0] adds r0, r0, #4 cmp r0, r2 bne .loop_clear2 mov sp, r2 movs r0, #1 movs r1, #2 movs r2, #3 movs r3, #4 svc #0 .loop: b .loop .align 4 .stack_start: .word 0x20000f00 .stack_last: .word 0x20000ffc @ first call - 0x2000fff8 -- should already be aligned @ second call - 0x2000fffc -- should hit the alignment code .global SVC_Handler SVC_Handler: bx lr Change-Id: Id0940e6bbd6a59adee1378c0e86fe86830f0c8fc Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Paul Fertser <fercerpav@gmail.com> Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com> Cc: Evan Hunter <evanhunter920@gmail.com> Cc: Jon Burgess <jburgess777@gmail.com> Reviewed-on: http://openocd.zylin.com/3003 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30rtos: turn stack alignment into a function pointerAndrew Ruder
Some targets (Cortex M) require more complicated calculations for turning the stored stack pointer back into a process stack pointer. For example, the Cortex M stores a bit in the auto-stacked xPSR indicating that alignment had to be performed and an additional 4 byte padding is present before the exception stacking. This change only sets up the framework for Cortex-M unstacking and does not add Cortex-M support. Note: this also fixes the alignment calculation nearly addressed by change #2301 entitled rtos/rtos.c: fix stack alignment calculation. Updated calculation is in rtos_generic_stack_align. Change-Id: I0f662cad0df81cbe5866219ad0fef980dcb3e44f Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Paul Fertser <fercerpav@gmail.com> Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com> Cc: Evan Hunter <evanhunter920@gmail.com> Cc: Jon Burgess <jburgess777@gmail.com> Reviewed-on: http://openocd.zylin.com/3002 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2015-10-30Add handling for STM32L4.Uwe Bonnes
Option handling not yet implemented. Change-Id: I5a11ef3221896cb02babe4e6e71073c43aa8740b Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2941 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30stm32f2x: Add memory barrier needed for STM32F7 flashing.Uwe Bonnes
Change-Id: I44fca55c46fc8f960ba46a0604692ce98909face Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2939 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-10-30stm32f2x.c: Add STM32F74x handling.Uwe Bonnes
Change-Id: I2e7a8e9f855fc99a3f2535e2af6c0921329a5013 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2940 Tested-by: jenkins Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com> Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30stm32f2x.c: Handle STM32F42x/43x 1 MiByte devices with DB1M option set.Uwe Bonnes
Change-Id: Ic51d34a9abe9693fd21e9b3247523821b6fb1fe3 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2938 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30quark: updating license to GPLv2+Ivan De Cesaris
Intel is relicensing our contributions to OpenOCD under GPL version 2 or any later version. We previously contributed code under GPL version 2 only. It was not our intention to differ from the standard OpenOCD license. We're correcting that here. This also applies retroactively to previous versions of our contributions to OpenOCD. Change-Id: I5e831ed95d03d2044d8e5a8375b21c6e52c933d7 Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com> Reviewed-on: http://openocd.zylin.com/3044 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-10-30tcl/board: Add Diolan LPC4357-DB1 configAndreas Färber
Adapted from diolan_lpc4350-db1.cfg. Both boards are identical except for the SoC, so keep them in sync. Change-Id: If892d8e953b0e3a9209a95b3b23a547357c10b7a Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3038 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Add LPC4357 configAndreas Färber
Reuse the flashless LPC4350 as base and amend it as necessary. The LPC43x7 have 2x 512 KB of flash. Change-Id: Ia7ffbc7101023479971984b839f171ed4be6b089 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3037 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30docs: added note for increasing gdb remotetimeout when using the "gdb_port ↵fenugrec
pipe" command. Change-Id: I9c9514a193fd65454890571a17373b9c64d84757 Signed-off-by: fenugrec <fenugrec@users.sourceforge.net> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3040 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30doc: Fix sort order of flash driversAndreas Färber
fm3, nrf51, mdr, sim3x were at the end of the section rather than inserted alphabetically. Fix this before adding further drivers. Change-Id: Id23e04749cdd3b25d7503ec00fac554742d48c77 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3019 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30tcl/board: Add Spansion SK-FM4-U120-9B560 configAndreas Färber
Change-Id: I01464b2a999890d50b95d0fb98ff46d8a04a2c57 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3009 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30Cortex-M: Detect Flash Patch Revision and implement Rev. 2 handling.Uwe Bonnes
E.g. STM32F7 implements Rev.2. Supercedes abandoned patch 2755 that doesn't evaluate Flash patch revision. Change-Id: I48756b0451c7359475066969c900978a536bc328 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2868 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30fm4: Add JTAG supportAndreas Färber
Add support for the JTAG TAPID found on SK-FM4-U120-9B560-MEM V1.1.0 board. Change-Id: Idbfe28927e0c549f0c89c29904d23971281927c9 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3039 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Prepare FM4 MB9BFxxx familyAndreas Färber
It is found on the SK-FM4-U120-9B560-MEM V1.1.0 among others. Change-Id: I4c708c9391e954cbbc8d0860a2a2dbd264aea865 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3008 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30fm4: Split out S6E2CC family configAndreas Färber
Its memory layout is different from MB9BFxxx. Change-Id: I39c9f9cf582cd182971a9f83bb88c7a18da6cf15 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3007 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/board: Add Arndale configAndreas Färber
Tested with Olimex ARM-USB-OCD-H adapter. Change-Id: I1bf68176f9c155f8803df5a10a7fbe03116c6309 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3081 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30tcl/target: Add Exynos5250 configAndreas Färber
Change-Id: Ia673d3f16b2238d5af8fbeff2d57c6cf27dcffb1 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3080 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-10-16 13:28:24 +0000