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-rw-r--r--tcl/board/ti_cc13x0_launchpad.cfg7
-rw-r--r--tcl/board/ti_cc13x2_launchpad.cfg7
-rw-r--r--tcl/board/ti_cc26x0_launchpad.cfg7
-rw-r--r--tcl/board/ti_cc26x2_launchpad.cfg7
-rw-r--r--tcl/target/ti_cc13x0.cfg11
-rw-r--r--tcl/target/ti_cc13x2.cfg11
-rw-r--r--[-rwxr-xr-x]tcl/target/ti_cc26x0.cfg (renamed from tcl/target/cc26xx.cfg)40
-rw-r--r--tcl/target/ti_cc26x2.cfg11
8 files changed, 87 insertions, 14 deletions
diff --git a/tcl/board/ti_cc13x0_launchpad.cfg b/tcl/board/ti_cc13x0_launchpad.cfg
new file mode 100644
index 00000000..9e1c1ea3
--- /dev/null
+++ b/tcl/board/ti_cc13x0_launchpad.cfg
@@ -0,0 +1,7 @@
+#
+# TI CC13x0 LaunchPad Evaluation Kit
+#
+source [find interface/xds110.cfg]
+transport select jtag
+adapter_khz 2500
+source [find target/ti_cc13x0.cfg]
diff --git a/tcl/board/ti_cc13x2_launchpad.cfg b/tcl/board/ti_cc13x2_launchpad.cfg
new file mode 100644
index 00000000..18c5ce51
--- /dev/null
+++ b/tcl/board/ti_cc13x2_launchpad.cfg
@@ -0,0 +1,7 @@
+#
+# TI CC13x2 LaunchPad Evaluation Kit
+#
+source [find interface/xds110.cfg]
+adapter_khz 2500
+transport select jtag
+source [find target/ti_cc13x2.cfg]
diff --git a/tcl/board/ti_cc26x0_launchpad.cfg b/tcl/board/ti_cc26x0_launchpad.cfg
new file mode 100644
index 00000000..3613a47f
--- /dev/null
+++ b/tcl/board/ti_cc26x0_launchpad.cfg
@@ -0,0 +1,7 @@
+#
+# TI CC26x0 LaunchPad Evaluation Kit
+#
+source [find interface/xds110.cfg]
+adapter_khz 2500
+transport select jtag
+source [find target/ti_cc26x0.cfg]
diff --git a/tcl/board/ti_cc26x2_launchpad.cfg b/tcl/board/ti_cc26x2_launchpad.cfg
new file mode 100644
index 00000000..2f2b34b4
--- /dev/null
+++ b/tcl/board/ti_cc26x2_launchpad.cfg
@@ -0,0 +1,7 @@
+#
+# TI CC26x2 LaunchPad Evaluation Kit
+#
+source [find interface/xds110.cfg]
+adapter_khz 2500
+transport select jtag
+source [find target/ti_cc26x2.cfg]
diff --git a/tcl/target/ti_cc13x0.cfg b/tcl/target/ti_cc13x0.cfg
new file mode 100644
index 00000000..6ea9bd80
--- /dev/null
+++ b/tcl/target/ti_cc13x0.cfg
@@ -0,0 +1,11 @@
+#
+# Texas Instruments CC13x0 - ARM Cortex-M3
+#
+# http://www.ti.com
+#
+
+set CHIPNAME cc13x0
+set JRC_TAPID 0x0B9BE02F
+set WORKAREASIZE 0x4000
+
+source [find target/ti_cc26x0.cfg]
diff --git a/tcl/target/ti_cc13x2.cfg b/tcl/target/ti_cc13x2.cfg
new file mode 100644
index 00000000..280eef45
--- /dev/null
+++ b/tcl/target/ti_cc13x2.cfg
@@ -0,0 +1,11 @@
+#
+# Texas Instruments CC13x2 - ARM Cortex-M4
+#
+# http://www.ti.com
+#
+
+set CHIPNAME cc13x2
+set JRC_TAPID 0x0BB4102F
+set WORKAREASIZE 0x7000
+
+source [find target/ti_cc26x0.cfg]
diff --git a/tcl/target/cc26xx.cfg b/tcl/target/ti_cc26x0.cfg
index c3ac8470..7efecb66 100755..100644
--- a/tcl/target/cc26xx.cfg
+++ b/tcl/target/ti_cc26x0.cfg
@@ -1,23 +1,25 @@
-# Config for Texas Instruments low power SoC CC26xx family
-
-adapter_khz 100
+#
+# Texas Instruments CC26x0 - ARM Cortex-M3
+#
+# http://www.ti.com
+#
source [find target/icepick.cfg]
source [find target/ti-cjtag.cfg]
if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
+ set _CHIPNAME $CHIPNAME
} else {
- set _CHIPNAME cc26xx
+ set _CHIPNAME cc26x0
}
#
# Main DAP
#
if { [info exists DAP_TAPID] } {
- set _DAP_TAPID $DAP_TAPID
+ set _DAP_TAPID $DAP_TAPID
} else {
- set _DAP_TAPID 0x4BA00477
+ set _DAP_TAPID 0x4BA00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
@@ -26,19 +28,29 @@ jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable $_CHIPNAME.
# ICEpick-C (JTAG route controller)
#
if { [info exists JRC_TAPID] } {
- set _JRC_TAPID $JRC_TAPID
+ set _JRC_TAPID $JRC_TAPID
} else {
- set _JRC_TAPID 0x1B99A02F
+ set _JRC_TAPID 0x0B99A02F
}
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
-# A start sequence is needed to change from cJTAG (Compact JTAG) to
-# 4-pin JTAG before talking via JTAG commands
jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.cpu"
+# A start sequence is needed to change from 2-pin cJTAG to 4-pin JTAG
jtag configure $_CHIPNAME.jrc -event post-reset "ti_cjtag_to_4pin_jtag $_CHIPNAME.jrc"
-#
-# Cortex-M3 target
-#
set _TARGETNAME $_CHIPNAME.cpu
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x4000
+}
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cc26xx 0 0 0 0 $_TARGETNAME
+
+reset_config srst_only
+adapter_nsrst_delay 100
diff --git a/tcl/target/ti_cc26x2.cfg b/tcl/target/ti_cc26x2.cfg
new file mode 100644
index 00000000..ecee3fab
--- /dev/null
+++ b/tcl/target/ti_cc26x2.cfg
@@ -0,0 +1,11 @@
+#
+# Texas Instruments CC26x2 - ARM Cortex-M4
+#
+# http://www.ti.com
+#
+
+set CHIPNAME cc26x2
+set JRC_TAPID 0x0BB4102F
+set WORKAREASIZE 0x7000
+
+source [find target/ti_cc26x0.cfg]