diff options
Diffstat (limited to 'tcl/target')
-rw-r--r-- | tcl/target/at91sam4XXX.cfg | 42 | ||||
-rw-r--r-- | tcl/target/at91sam4lXX.cfg | 6 | ||||
-rw-r--r-- | tcl/target/at91sam4sXX.cfg | 1 | ||||
-rw-r--r-- | tcl/target/at91sam4sd32x.cfg | 1 | ||||
-rw-r--r-- | tcl/target/at91samdXX.cfg | 61 |
5 files changed, 96 insertions, 15 deletions
diff --git a/tcl/target/at91sam4XXX.cfg b/tcl/target/at91sam4XXX.cfg index 24b3deb8..cc2941a8 100644 --- a/tcl/target/at91sam4XXX.cfg +++ b/tcl/target/at91sam4XXX.cfg @@ -1,6 +1,12 @@ +# # script for ATMEL sam4, a CORTEX-M4 chip # +# +# sam4 devices can support both JTAG and SWD transports. +# +source [find target/swj-dp.tcl] + if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { @@ -13,17 +19,13 @@ if { [info exists ENDIAN] } { set _ENDIAN little } -# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz -# -# Since we may be running of an RC oscilator, we crank down the speed a -# bit more to be on the safe side. Perhaps superstition, but if are -# running off a crystal, we can run closer to the limit. Note -# that there can be a pretty wide band where things are more or less stable. - -adapter_khz 500 - -adapter_nsrst_delay 100 -jtag_ntrst_delay 100 +# Work-area is a space in RAM used for flash programming +# By default use 64kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} #jtag scan chain if { [info exists CPUTAPID] } { @@ -32,18 +34,32 @@ if { [info exists CPUTAPID] } { set _CPUTAPID 0x4ba00477 } -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID +swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME # 16K is plenty, the smallest chip has this much -$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 $_TARGETNAME configure -event gdb-flash-erase-start { halt } +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz +# +# Since we may be running of an RC oscilator, we crank down the speed a +# bit more to be on the safe side. Perhaps superstition, but if are +# running off a crystal, we can run closer to the limit. Note +# that there can be a pretty wide band where things are more or less stable. + +adapter_khz 500 + +adapter_nsrst_delay 100 +if {$using_jtag} { + jtag_ntrst_delay 100 +} + # if srst is not fitted use SYSRESETREQ to # perform a soft reset cortex_m reset_config sysresetreq diff --git a/tcl/target/at91sam4lXX.cfg b/tcl/target/at91sam4lXX.cfg new file mode 100644 index 00000000..67759bc6 --- /dev/null +++ b/tcl/target/at91sam4lXX.cfg @@ -0,0 +1,6 @@ +# script for ATMEL sam4l, a CORTEX-M4 chip +# + +source [find target/at91sam4XXX.cfg] + +# no flash defined yet diff --git a/tcl/target/at91sam4sXX.cfg b/tcl/target/at91sam4sXX.cfg index 0b29f5e8..3de4aa85 100644 --- a/tcl/target/at91sam4sXX.cfg +++ b/tcl/target/at91sam4sXX.cfg @@ -1,7 +1,6 @@ # script for ATMEL sam4, a CORTEX-M4 chip # - source [find target/at91sam4XXX.cfg] set _FLASHNAME $_CHIPNAME.flash diff --git a/tcl/target/at91sam4sd32x.cfg b/tcl/target/at91sam4sd32x.cfg index 4bc93cbf..e44db66e 100644 --- a/tcl/target/at91sam4sd32x.cfg +++ b/tcl/target/at91sam4sd32x.cfg @@ -1,7 +1,6 @@ # script for ATMEL sam4sd32, a CORTEX-M4 chip # - source [find target/at91sam4XXX.cfg] set _FLASHNAME $_CHIPNAME.flash0 diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg new file mode 100644 index 00000000..0a1ef26c --- /dev/null +++ b/tcl/target/at91samdXX.cfg @@ -0,0 +1,61 @@ +# +# script for ATMEL samdXX, a CORTEX-M0 chip +# + +# +# samdXX devices only support SWD transports. +# +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME at91samd +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# By default use 2kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x800 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +$_TARGETNAME configure -event gdb-flash-erase-start { + halt +} + +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz +# +# Since we may be running of an RC oscilator, we crank down the speed a +# bit more to be on the safe side. Perhaps superstition, but if are +# running off a crystal, we can run closer to the limit. Note +# that there can be a pretty wide band where things are more or less stable. + +adapter_khz 500 +adapter_nsrst_delay 100 + +# if srst is not fitted use SYSRESETREQ to +# perform a soft reset +cortex_m reset_config sysresetreq + +# no flash defined yet |