aboutsummaryrefslogtreecommitdiff
path: root/tcl/target/omap3530.cfg
diff options
context:
space:
mode:
Diffstat (limited to 'tcl/target/omap3530.cfg')
-rw-r--r--tcl/target/omap3530.cfg12
1 files changed, 6 insertions, 6 deletions
diff --git a/tcl/target/omap3530.cfg b/tcl/target/omap3530.cfg
index ba130a9c..018363a9 100644
--- a/tcl/target/omap3530.cfg
+++ b/tcl/target/omap3530.cfg
@@ -1,11 +1,11 @@
# TI OMAP3530
-# http://focus.ti.com/docs/prod/folders/print/omap3530.html
+# http://focus.ti.com/docs/prod/folders/print/omap3530.html
# Other OMAP3 chips remove DSP and/or the OpenGL support
if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
+ set _CHIPNAME $CHIPNAME
} else {
- set _CHIPNAME omap3530
+ set _CHIPNAME omap3530
}
# ICEpick-C ... used to route Cortex, DSP, and more not shown here
@@ -15,7 +15,7 @@ source [find target/icepick.cfg]
jtag newtap $_CHIPNAME dsp -irlen 38 -ircapture 0x25 -irmask 0x3f -disable
# Subsidiary TAP: CoreSight Debug Access Port (DAP)
-if { [info exists DAP_TAPID ] } {
+if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x0b6d602f
@@ -26,7 +26,7 @@ jtag configure $_CHIPNAME.dap -event tap-enable \
"icepick_c_tapenable $_CHIPNAME.jrc 3"
# Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
-if { [info exists JRC_TAPID ] } {
+if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
} else {
set _JRC_TAPID 0x0b7ae02f
@@ -34,7 +34,7 @@ if { [info exists JRC_TAPID ] } {
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
-expected-id $_JRC_TAPID
-# GDB target: Cortex-A8, using DAP
+# GDB target: Cortex-A8, using DAP
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap