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-rw-r--r--tcl/target/cs351x.cfg14
1 files changed, 7 insertions, 7 deletions
diff --git a/tcl/target/cs351x.cfg b/tcl/target/cs351x.cfg
index 243f9639..0785d538 100644
--- a/tcl/target/cs351x.cfg
+++ b/tcl/target/cs351x.cfg
@@ -1,22 +1,22 @@
if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
+ set _CHIPNAME $CHIPNAME
} else {
- set _CHIPNAME cs351x
+ set _CHIPNAME cs351x
}
if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
+ set _ENDIAN $ENDIAN
} else {
- set _ENDIAN little
+ set _ENDIAN little
}
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x00526fa1
}
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# Create the GDB Target.
set _TARGETNAME $_CHIPNAME.cpu
@@ -24,7 +24,7 @@ target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -
# There is 16K of SRAM on this chip
# FIXME: flash programming is not working by using this work area. So comment this out for now.
-#$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1
+#$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1
# This chip has a DCC ... use it
arm7_9 dcc_downloads enable