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Diffstat (limited to 'src/target/cortex_m.h')
-rw-r--r--src/target/cortex_m.h17
1 files changed, 9 insertions, 8 deletions
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 28189e02..028b4c8d 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -33,10 +33,11 @@
#define SYSTEM_CONTROL_BASE 0x400FE000
-#define ITM_TER 0xE0000E00
+#define ITM_TER0 0xE0000E00
#define ITM_TPR 0xE0000E40
#define ITM_TCR 0xE0000E80
#define ITM_LAR 0xE0000FB0
+#define ITM_LAR_KEY 0xC5ACCE55
#define CPUID 0xE000ED00
/* Debug Control Block */
@@ -69,13 +70,13 @@
#define FPU_FPCAR 0xE000EF38
#define FPU_FPDSCR 0xE000EF3C
-#define TPI_SSPSR 0xE0040000
-#define TPI_CSPSR 0xE0040004
-#define TPI_ACPR 0xE0040010
-#define TPI_SPPR 0xE00400F0
-#define TPI_FFSR 0xE0040300
-#define TPI_FFCR 0xE0040304
-#define TPI_FSCR 0xE0040308
+#define TPIU_SSPSR 0xE0040000
+#define TPIU_CSPSR 0xE0040004
+#define TPIU_ACPR 0xE0040010
+#define TPIU_SPPR 0xE00400F0
+#define TPIU_FFSR 0xE0040300
+#define TPIU_FFCR 0xE0040304
+#define TPIU_FSCR 0xE0040308
/* DCB_DHCSR bit and field definitions */
#define DBGKEY (0xA05F << 16)