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Diffstat (limited to 'src/target/cortex_a.c')
-rw-r--r--src/target/cortex_a.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 9ae04322..ab52dd75 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -146,14 +146,14 @@ static int cortex_a_mmu_modify(struct target *target, int enable)
cortex_a->cp15_control_reg_curr);
}
} else {
- if (cortex_a->cp15_control_reg_curr & 0x4U) {
- /* data cache is active */
- cortex_a->cp15_control_reg_curr &= ~0x4U;
- /* flush data cache armv7 function to be called */
- if (armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache)
- armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache(target);
- }
if ((cortex_a->cp15_control_reg_curr & 0x1U)) {
+ if (cortex_a->cp15_control_reg_curr & 0x4U) {
+ /* data cache is active */
+ cortex_a->cp15_control_reg_curr &= ~0x4U;
+ /* flush data cache armv7 function to be called */
+ if (armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache)
+ armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache(target);
+ }
cortex_a->cp15_control_reg_curr &= ~0x1U;
retval = armv7a->arm.mcr(target, 15,
0, 0, /* op1, op2 */