diff options
Diffstat (limited to 'src/target/arm_adi_v5.h')
| -rw-r--r-- | src/target/arm_adi_v5.h | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index 7f61ff04..7140c8dc 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -90,19 +90,20 @@ #define CSYSPWRUPACK (1UL << 31) /* MEM-AP register addresses */ -/* TODO: rename as MEM_AP_REG_* */ -#define AP_REG_CSW 0x00 -#define AP_REG_TAR 0x04 -#define AP_REG_DRW 0x0C -#define AP_REG_BD0 0x10 -#define AP_REG_BD1 0x14 -#define AP_REG_BD2 0x18 -#define AP_REG_BD3 0x1C -#define AP_REG_CFG 0xF4 /* big endian? */ -#define AP_REG_BASE 0xF8 - +#define MEM_AP_REG_CSW 0x00 +#define MEM_AP_REG_TAR 0x04 +#define MEM_AP_REG_TAR64 0x08 /* RW: Large Physical Address Extension */ +#define MEM_AP_REG_DRW 0x0C /* RW: Data Read/Write register */ +#define MEM_AP_REG_BD0 0x10 /* RW: Banked Data register 0-3 */ +#define MEM_AP_REG_BD1 0x14 +#define MEM_AP_REG_BD2 0x18 +#define MEM_AP_REG_BD3 0x1C +#define MEM_AP_REG_MBT 0x20 /* --: Memory Barrier Transfer register */ +#define MEM_AP_REG_BASE64 0xF0 /* RO: Debug Base Address (LA) register */ +#define MEM_AP_REG_CFG 0xF4 /* RO: Configuration register */ +#define MEM_AP_REG_BASE 0xF8 /* RO: Debug Base Address register */ /* Generic AP register address */ -#define AP_REG_IDR 0xFC +#define AP_REG_IDR 0xFC /* RO: Identification Register */ /* Fields of the MEM-AP's CSW register */ #define CSW_8BIT 0 |